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Catalog Datasheet	MFG & Type	PDF	Document Tags
IS61LVPS25636A Abstract: XPS ipic axi4 example XC6SL* MEMORY state machine axi 3 protocol emc core IDT71V ise 9922 XC7K325T-FFG676 Text: LogiCORE IP AXI External Memory Controller v1.02a DS762 October 19, 2011 Product Specification Introduction LogiCORE IP Facts Table The AXI External Memory Controller (EMC) IP core provides a control interface for external synchronous, asynchronous SRAM, Flash and PSRAM/Cellular	Original	PDF	DS762 ZynqTM-7000, IS61LVPS25636A XPS ipic axi4 example XC6SL* MEMORY state machine axi 3 protocol emc core IDT71V ise 9922 XC7K325T-FFG676
XC7K325TFFG900 Abstract: XC6SLX45-CSG324 XC3SD3400AFG676 XC7K325T-ffg900 spartan ucf file 6 XC6SLX16-FTG256 XC6SLX25-CSG324-2C XC6SLX16-CSG324 XC6SLX45-FGG484 XC7K355T-FFG901 Text: LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI DS206 October 19, 2011 Product Specification v3.167 & v4.15 Features LogiCORE IP Facts Table • Fully compatible 32-bit, 66/33 MHz Initiator/Target core for PCI • Customizable, programmable, single-chip solution	Original	PDF	32-Bit DS206 32-bit, XC7K325TFFG900 XC6SLX45-CSG324 XC3SD3400AFG676 XC7K325T-ffg900 spartan ucf file 6 XC6SLX16-FTG256 XC6SLX25-CSG324-2C XC6SLX16-CSG324 XC6SLX45-FGG484 XC7K355T-FFG901
XC7Z020CLG400 Abstract: XC7Z020CLG484 XC7K160Tffg676 XC7Z045FFG900 XC7A200T-FBG484 XC7Z010-CLG400 Text: LogiCORE IP 64-Bit Initiator/Target v3 & v4 for PCI DS205 October 16, 2012 Product Specification v3.167 & v4.18 Features LogiCORE IP Facts • Fully compatible 64-bit, 66/33 MHz LogiCORE IP Initiator/Target core for PCI™ • Customizable, programmable, single-chip solution	Original	PDF	64-Bit DS205 64-bit, XC7Z020CLG400 XC7Z020CLG484 XC7K160Tffg676 XC7Z045FFG900 XC7A200T-FBG484 XC7Z010-CLG400
xc7a100tcsg324 Abstract: XC7A200T-FBG484 XC6SLX16CSG324 Xilinx ISE Design Suite 14.2 XC6SLX45-FGG484 XC6SLX100-FGG676 XC6SLX16-CSG324 XC6SLX45-CSG324 XC6SLX9CSG324 XC6SLX45-CSG484 Text: LogiCORE IP 64-Bit Initiator/Target v3 & v4 for PCI DS205 July 25, 2012 Product Specification v3.167 & v4.17 Features LogiCORE IP Facts • Fully compatible 64-bit, 66/33 MHz LogiCORE IP Initiator/Target core for PCI™ • Customizable, programmable, single-chip solution	Original	PDF	64-Bit DS205 64-bit, xc7a100tcsg324 XC7A200T-FBG484 XC6SLX16CSG324 Xilinx ISE Design Suite 14.2 XC6SLX45-FGG484 XC6SLX100-FGG676 XC6SLX16-CSG324 XC6SLX45-CSG324 XC6SLX9CSG324 XC6SLX45-CSG484
XC7K160Tffg676 Abstract: XC7K160T-FBG676 XC7K325TFFG900 XC7K325T-FFG676 XC6SLX45-FGG484 XC6SLX16CSG324 XC6SLX45-CSG484 XC7K410TFFG900 XC7V585T-FFG1761 XC6SLX45-CSG324 Text: LogiCORE IP 64-Bit Initiator/Target v3 & v4 for PCI DS205 October 19, 2011 Product Specification v3.167 & v4.15 Features LogiCORE IP Facts • Fully compliant 64-bit, 66/33 MHz LogiCORE IP Initiator/Target core for PCI™ • Customizable, programmable, single-chip solution	Original	PDF	64-Bit DS205 64-bit, XC7K160Tffg676 XC7K160T-FBG676 XC7K325TFFG900 XC7K325T-FFG676 XC6SLX45-FGG484 XC6SLX16CSG324 XC6SLX45-CSG484 XC7K410TFFG900 XC7V585T-FFG1761 XC6SLX45-CSG324
xc7a100tcsg324 Abstract: XC7K160Tffg676 XC7K325TFFG676 XC7A200T-FBG484 XC7K325T-FFG676 xc6slx25tcsg324 XC6SLX4-TQG144-2C XC7K480TFFG901 XC7K325T-FBG900-1C/I XC7Z020CLG400 Text: LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI DS206 October 16, 2012 Product Specification v3.167 & v4.18 Features LogiCORE IP Facts Table • Fully compatible 32-bit, 66/33 MHz Initiator/Target core for PCI • Customizable, programmable, single-chip solution	Original	PDF	32-Bit DS206 32-bit, xc7a100tcsg324 XC7K160Tffg676 XC7K325TFFG676 XC7A200T-FBG484 XC7K325T-FFG676 xc6slx25tcsg324 XC6SLX4-TQG144-2C XC7K480TFFG901 XC7K325T-FBG900-1C/I XC7Z020CLG400
XC7VX1140T-FLG1926 Abstract: No abstract text available Text: 7 Series FPGAs GTX/GTH Transceivers User Guide UG476 v1.9.1 April 22, 2013 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL	Original	PDF	UG476 XC7VX1140T-FLG1926
xc7a100tcsg324 Abstract: Spartan-6 XC6SLX45-CSG324 XC3SD1800A-FG676 SPARTAN DSP XC7A200T-FBG484 XC6SLX9CSG225 XC6SLX4-TQG144-2C XC6SLX9-CSG225 Xilinx ISE Design Suite 14.2 XC7A50T XC6SLX16-CSG225 Text: LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI DS206 July 25, 2012 Product Specification v3.167 & v4.17 Features LogiCORE IP Facts Table • Fully compatible 32-bit, 66/33 MHz Initiator/Target core for PCI • Customizable, programmable, single-chip solution	Original	PDF	32-Bit DS206 32-bit, xc7a100tcsg324 Spartan-6 XC6SLX45-CSG324 XC3SD1800A-FG676 SPARTAN DSP XC7A200T-FBG484 XC6SLX9CSG225 XC6SLX4-TQG144-2C XC6SLX9-CSG225 Xilinx ISE Design Suite 14.2 XC7A50T XC6SLX16-CSG225