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    SSTU32866EC Price and Stock

    NXP Semiconductors SSTU32866EC-G,557

    IC BUFFER 1.8V 25BIT SOT536-1
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SSTU32866EC-G,557 Tray 1,425
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 $1.67655
    		Buy Now

    NXP Semiconductors SSTU32866EC-G,551

    IC 25BIT CONFIG REG BUFF 96LFBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SSTU32866EC-G,551 Tray 285
    • 1 -
    • 10 -
    • 100 -
    • 1000 $1.79818
    • 10000 $1.79818
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    Philips Semiconductors SSTU32866EC/G,518

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Bristol Electronics SSTU32866EC/G,518 3,500 2
    • 1 -
    • 10 $2.25
    • 100 $1.125
    • 1000 $0.99
    • 10000 $0.99
    		Buy Now
    Quest Components SSTU32866EC/G,518 2,800
    • 1 $4
    • 10 $4
    • 100 $4
    • 1000 $1.1
    • 10000 $1.1
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    SSTU32866EC Datasheets (10)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SSTU32866EC Philips Semiconductors SSTU32866, 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications Original PDF
    SSTU32866EC,518 NXP Semiconductors 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications - Application: DDR2 400-533 Registered DIMMs ; Features: Parity checking ; Hold time (CLK-DATA): 0.75 ns; Inputs: 14 (1:2) or 25 (1:1) x SSTL_18 ; Operating frequency: 0~270 MHz; Operating temperature: 0~+70 Cel; Outputs: 25 (1:1) or 28 (1:2) x SSTL_18 ; Propagation delay: 1.4~1.8 ns; Set-up time (DATA-CLK): 0.2 ns; Supply voltage: 1.7~1.9 V; Package: SOT536-1 (LFBGA96); Container: Tape reel smd Original PDF
    SSTU32866EC,551 NXP Semiconductors 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications - Application: DDR2 400-533 Registered DIMMs ; Features: Parity checking ; Hold time (CLK-DATA): 0.75 ns; Inputs: 14 (1:2) or 25 (1:1) x SSTL_18 ; Operating frequency: 0~270 MHz; Operating temperature: 0~+70 Cel; Outputs: 25 (1:1) or 28 (1:2) x SSTL_18 ; Propagation delay: 1.4~1.8 ns; Set-up time (DATA-CLK): 0.2 ns; Supply voltage: 1.7~1.9 V; Package: SOT536-1 (LFBGA96); Container: Tray Dry Pack, Bakeable, Single Original PDF
    SSTU32866EC,557 NXP Semiconductors 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications - Application: DDR2 400-533 Registered DIMMs ; Features: Parity checking ; Hold time (CLK-DATA): 0.75 ns; Inputs: 14 (1:2) or 25 (1:1) x SSTL_18 ; Operating frequency: 0~270 MHz; Operating temperature: 0~+70 Cel; Outputs: 25 (1:1) or 28 (1:2) x SSTL_18 ; Propagation delay: 1.4~1.8 ns; Set-up time (DATA-CLK): 0.2 ns; Supply voltage: 1.7~1.9 V; Package: SOT536-1 (LFBGA96); Container: Tray Dry Pack, Bakeable, Multiple Original PDF
    SSTU32866EC/G Philips Semiconductors SSTU32866, 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications Original PDF
    SSTU32866EC/G,518 NXP Semiconductors 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications; Package: SOT536-1 (LFBGA96); Container: Tape reel smd Original PDF
    SSTU32866EC/G,551 NXP Semiconductors 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications; Package: SOT536-1 (LFBGA96); Container: Tray Dry Pack, Bakeable, Single Original PDF
    SSTU32866EC/G,557 NXP Semiconductors 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications; Package: SOT536-1 (LFBGA96); Container: Tray Dry Pack, Bakeable, Multiple Original PDF
    SSTU32866EC/G-T NXP Semiconductors 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications - Application: DDR2 400-533 Registered DIMMs ; Features: Parity checking ; Hold time (CLK-DATA): 0.75 ns; Inputs: 14 (1:2) or 25 (1:1) x SSTL_18 ; Operating frequency: 0~270 MHz; Operating temperature: 0~+70 Cel; Outputs: 25 (1:1) or 28 (1:2) x SSTL_18 ; Propagation delay: 1.4~1.8 ns; Set-up time (DATA-CLK): 0.2 ns; Supply voltage: 1.7~1.9 V Original PDF
    SSTU32866EC-T NXP Semiconductors 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications - Application: DDR2 400-533 Registered DIMMs ; Features: Parity checking ; Hold time (CLK-DATA): 0.75 ns; Inputs: 14 (1:2) or 25 (1:1) x SSTL_18 ; Operating frequency: 0~270 MHz; Operating temperature: 0~+70 Cel; Outputs: 25 (1:1) or 28 (1:2) x SSTL_18 ; Propagation delay: 1.4~1.8 ns; Set-up time (DATA-CLK): 0.2 ns; Supply voltage: 1.7~1.9 V Original PDF

    SSTU32866EC Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original     		P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS PDF

    INSSTE32882

    Abstract: maxim dallas 2501 P16CV SY100EL16 SN65MLVD201 SN65EPT22 INCU877 INCUA877 ttl crystal oscillator using 7404 P16CV857B
    Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer


    Original     		PDF

    INSSTE32882

    Abstract: maxim dallas 2501 insstua32866 INSSTU32864 INSSTU32866 ttl crystal oscillator using CIRCUIT DIAGRAM INCUA877 ps 2501 dallas GSM home automation block diagram INCU877
    Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer


    Original     		PDF

    220v AC voltage stabilizer schematic diagram

    Abstract: LG color tv Circuit Diagram tda 9370 1000w inverter PURE SINE WAVE schematic diagram schematic diagram atx Power supply 500w TV SHARP IC TDA 9381 PS circuit diagram wireless spy camera 9744 mini mainboard v1.2 sony 279-87 transistor E 13005-2 superpro lx
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 AD9272 Analog Front End, iMEMS Accelerometers & Gyroscopes . . . . . . 782, 2583 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-528 Acceleration and Pressure Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . Page 2585


    Original     		AD9272 P462-ND LNG295LFCP2U P463-ND LNG395MFTP5U 220v AC voltage stabilizer schematic diagram LG color tv Circuit Diagram tda 9370 1000w inverter PURE SINE WAVE schematic diagram schematic diagram atx Power supply 500w TV SHARP IC TDA 9381 PS circuit diagram wireless spy camera 9744 mini mainboard v1.2 sony 279-87 transistor E 13005-2 superpro lx PDF

    Q11A

    Abstract: SSTU32864 SSTU32866 SSTU32866EC
    Text: SSTU32866 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications Rev. 02 — 11 November 2004 Product data sheet 1. General description The SSTU32866 is a 1.8 V configurable register specifically designed for use on DDR2


    Original     		SSTU32866 25-bit 14-bit SSTU32866 JESD82-7 SSTU32864 Q11A SSTU32866EC PDF

    Q11A

    Abstract: Q13A SSTU32864 SSTU32866 SSTU32866EC
    Text: SSTU32866 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications Rev. 01 — 09 July 2004 Objective data 1. Description The SSTU32866 is a 1.8 V configurable register specifically designed for use on DDR2 memory modules requiring a parity checking function. It is defined in


    Original     		SSTU32866 25-bit 14-bit SSTU32866 JESD82-7 SSTU32864 Q11A Q13A SSTU32866EC PDF

    list of P channel power mosfet

    Abstract: BT151 MOSFET Transistor smd BQ 22 SSTU32964 smd transistor bq 22 A114 pnp TEA1620P equivalent BQ 24 smd semiconductors TEA1622 SMD Transistor PNP Switching circuit, Inverter, Interface circuit, Driver circuit
    Text: New MultiMarket Products Quarterly highlights Semiconductors VOLUME 3 • ISSUE 3 ■ AUGUST 2004 Welcome to the latest issue of Philips’ New MultiMarket Products – Quarterly highlights. In this issue: In addition to discovering some of the key features and benefits of some of our most recent


    Original     		P89LPC932A1 LPC932 OT416 PBSS5480X SSTU32864, SSTU32865, SSTU3286 list of P channel power mosfet BT151 MOSFET Transistor smd BQ 22 SSTU32964 smd transistor bq 22 A114 pnp TEA1620P equivalent BQ 24 smd semiconductors TEA1622 SMD Transistor PNP Switching circuit, Inverter, Interface circuit, Driver circuit PDF