Untitled
Abstract: No abstract text available
Text: Package outline XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm 1 2 SOT833-1 b 4 3 4x 2 L L1 e 8 7 6 e1 5 e1 e1 8× A (2) A1 D E terminal 1 index area 1 2 mm scale DIMENSIONS (mm are the original dimensions)
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OT833-1
MO-252
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SOT833
Abstract: sot833-1 NXP 12NC ending nxp Tape and Reel Information
Text: SOT833-1 Standard product orientation 12NC ending 115 Rev. 01 — 17 April 2009 Packing information 1. Packing method Fig. 1 Package version 12NC ending Reel dimensions d x w mm SPQ/PQ (pcs) Reels per box Outer box dimensions l x w x h (mm) SOT833 115 180 x 8
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OT833-1
OT833
OT833-1
SOT833
sot833-1
NXP 12NC ending
nxp Tape and Reel Information
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MO-252
Abstract: SOT833 6E-15 SOT-833 sot833-1
Text: Package outline Philips Semiconductors XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm 1 2 SOT833-1 b 4 3 4x 2 L L1 e 8 7 6 e1 5 e1 e1 8× A (2) A1 D E terminal 1 index area 1 2 mm scale DIMENSIONS (mm are the original dimensions)
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OT833-1
MO-252
T833-1
MO-252
SOT833
6E-15
SOT-833
sot833-1
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Untitled
Abstract: No abstract text available
Text: SOT833-1 Standard product orientation 12NC ending 115 Rev. 03 — 28 July 2011 Packing information 1. Packing method Fig. 1 Package version 12NC ending Reel dimensions d x w mm SPQ/PQ (pcs) Reels per box Outer box dimensions l x w x h (mm) SOT833 115 180 x 8
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OT833-1
OT833
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nz104
Abstract: No abstract text available
Text: 74LVC2G66 Bilateral switch Rev. 7 — 22 June 2012 Product data sheet 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input (nE).
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74LVC2G66
74LVC2G66
nz104
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MARKING V7 6-PIN
Abstract: No abstract text available
Text: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 11 — 6 July 2012 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
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74LVC3G14
74LVC3G14
MARKING V7 6-PIN
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Marking code V7
Abstract: No abstract text available
Text: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.
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74LVC2G00
74LVC2G00
Marking code V7
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JESD22-A114E
Abstract: NX3L1G53GD NX3L1G53GM NX3L1G53GT
Text: NX3L1G53 Low-ohmic single-pole double-throw analog switch Rev. 03 — 17 April 2009 Product data sheet 1. General description The NX3L1G53 provides one low-ohmic single-pole double-throw analog switch, suitable for use as an analog or digital multiplexer/demultiplexer. It has a digital select input S ,
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JESD22-A114E
NX3L1G53GD
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74LVC1G53
Abstract: 74LVC1G53DC 74LVC1G53DP 74LVC1G53GD 74LVC1G53GT JESD22-A114E MO-187 V53 TSSOP8
Text: 74LVC1G53 2-channel analog multiplexer/demultiplexer Rev. 05 — 11 June 2008 Product data sheet 1. General description The 74LVC1G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC1G53 provides one analog multiplexer/demultiplexer with a digital select
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74LVC1G53
74LVC1G53
74LVC1G53DC
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74LVC1G53GD
74LVC1G53GT
JESD22-A114E
MO-187
V53 TSSOP8
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74AUP2G125
Abstract: 74AUP2G125DC 74AUP2G125GT JESD22-A114E JESD78
Text: 74AUP2G125 Low-power dual buffer/line driver; 3-state Rev. 05 — 2 February 2009 Product data sheet 1. General description The 74AUP2G125 provides the dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE
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74AUP1G126
Abstract: 74AUP1G32 JESD22-A114E 74AUP1T1326
Text: 74AUP1T1326 Low-power dual supply buffer/line driver; 3-state Rev. 01 — 20 January 2009 Product data sheet 1. General description The 74AUP1T1326 is a high-performance, low-power, low-voltage, single-bit, dual supply buffer/line driver with output enable circuitry.
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74AUP1G32
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JESD22-A114E
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74LVC3G14
Abstract: 74LVC3G14DC 74LVC3G14DP 74LVC3G14GM 74LVC3G14GT JESD22-A114E MO-187
Text: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 07 — 12 June 2008 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger action. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of
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JESD22-A114E
MO-187
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74AVCH2T45
Abstract: 74AVCH2T45DC 74AVCH2T45GT JESD22-A114E
Text: 74AVCH2T45 Dual-bit, dual-supply voltage level translator/transceiver; 3-state Rev. 03 — 6 May 2009 Product data sheet 1. General description The 74AVCH2T45 is a dual bit, dual supply transceiver that enables bidirectional level translation. It features two data input-output ports nA and nB , a direction control input
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74LVC2G66
Abstract: 74LVC2G66DC 74LVC2G66DP 74LVC2G66GT 74LVCV2G66 JESD22-A114E JESD78
Text: 74LVC2G66 Bilateral switch Rev. 04 — 1 July 2008 Product data sheet 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input (nE).
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74AUP2G240
Abstract: 74AUP2G240DC 74AUP2G240GT JESD22-A114E JESD78
Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 03 — 7 April 2009 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE
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74LVC2G241
Abstract: 74LVC2G241DC 74LVC2G241DP 74LVC2G241GD 74LVC2G241GM 74LVC2G241GT JESD22-A114E
Text: 74LVC2G241 Dual buffer/line driver; 3-state Rev. 09 — 10 June 2008 Product data sheet 1. General description The 74LVC2G241 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE:
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JESD22-A114E
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SOT886
Abstract: sot833 SOT996 SOT-833 2G384 NX3L1G3157GM NX3L1G66GM NX3L1T3157GM NX3L2267GM NX3L4684GM
Text: NXP’s low-Ohmic switches, the NX3 family Low-Ohmic switches RON value of 0.75 Ω, 0.45 Ω These best in class low-Ohmic switches are an excellent choice for audio and mixed-signal applications in small, portable devices. Our NX3xxT products feature low-switching threshold
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LPC2148 i2c
Abstract: BGB210S lpc2148 interfacing 2.8" TFT LCD DISPLAY BGB210 embedded c code to interface lpc2148 with sensor BGW200 TDA8932T tda8920bj NXP PN531 TDA8947J equivalent
Text: Building blocks for vibrant media Highlights of the NXP product portfolio Building blocks for vibrant media At NXP Semiconductors, the new company founded by Philips, we’re driven by a single purpose — to deliver vibrant media technologies that create better sensory experiences.
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OT363
SC-88)
LPC2148 i2c
BGB210S
lpc2148 interfacing 2.8" TFT LCD DISPLAY
BGB210
embedded c code to interface lpc2148 with sensor
BGW200
TDA8932T
tda8920bj
NXP PN531
TDA8947J equivalent
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74LVC2G86
Abstract: 74LVC2G86DC 74LVC2G86DP 74LVC2G86GM 74LVC2G86GT
Text: 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Rev. 8 — 19 October 2010 Product data sheet 1. General description The 74LVC2G86 provides a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
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74LVC1G74DC
Abstract: 74LVC1G74 74LVC1G74DP 74LVC1G74GD 74LVC1G74GM 74LVC1G74GT
Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 9 — 5 August 2010 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q
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74AUP2G157DC
Abstract: 74AUP2G157GT
Text: 74AUP2G157 Low-power 2-input multiplexer Rev. 4 — 30 July 2010 Product data sheet 1. General description The 74AUP2G157 is a single 2-input multiplexer which select data from two data inputs I0 and I1 under control of a common data select input (S). The state of the common data
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1G3157
Abstract: digital SPST switch 1G384 2G384 ron 350 SOT353 NX3L1G3157GM NX3L1G66GM NX3L1T3157GM NX3V1G384GW
Text: NXP’s low-Ohmic switches, the NX3 family Low-Ohmic switches RON value of 0.75 Ω, 0.45 Ω These best in class low-Ohmic switches are an excellent choice for audio and mixed-signal applications in small, portable devices. Our NX3xxT products feature low-switching threshold
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74LVC3G07
Abstract: 74LVC3G07DC 74LVC3G07DP 74LVC3G07GM 74LVC3G07GT
Text: 74LVC3G07 Triple buffer with open-drain output Rev. 7 — 9 August 2010 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
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74LVC3G07GT
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JESD22-A114E
Abstract: NX3L2T66 NX3L2T66GM NX3L2T66GT
Text: NX3L2T66 Low-ohmic single-pole single-throw analog switch Rev. 01 — 4 December 2008 Product data sheet 1. General description The NX3L2T66 provides two low-ohmic single pole single throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input
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JESD22-A114E
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