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    SN74LV10ANSR Texas Instruments Triple 3-Input Positive-NAND Gate 14-SO -40 to 85 Visit Texas Instruments Buy
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    Texas Instruments SN74LV10ANSR

    IC GATE NAND 3CH 3-INP 14SO
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    Rochester Electronics LLC SN74LV10ANSR

    IC GATE NAND 3CH 3-INP 14SO
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    SN74LV10ANSR Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN74LV10ANSR Texas Instruments Triple 3-Input Positive-NAND Gate 14-SO -40 to 85 Original PDF
    SN74LV10ANSR Texas Instruments Triple 3-Input Positive-NAND Gate Original PDF
    SN74LV10ANSR Texas Instruments Vcc to GND: -0.5 to 7V input voltage: -0.5 to 7V input clamp current: -20mA triple 3-input positive-NAND gate Original PDF
    SN74LV10ANSR Texas Instruments SN74LV10 - Triple 3-Input Positive-NAND Gate 14-SO -40 to 85 Original PDF
    SN74LV10ANSRE4 Texas Instruments Triple 3-Input Positive-NAND Gate 14-SO -40 to 85 Original PDF
    SN74LV10ANSRE4 Texas Instruments Triple 3-Input Positive-NAND Gate Original PDF
    SN74LV10ANSRE4 Texas Instruments SN74LV10 - Triple 3-Input Positive-NAND Gate 14-SO -40 to 85 Original PDF
    SN74LV10ANSRG4 Texas Instruments Triple 3-Input Positive-NAND Gate 14-SO -40 to 85 Original PDF
    SN74LV10ANSRG4 Texas Instruments SN74LV10 - Triple 3-Input Positive-NAND Gate 14-SO -40 to 85 Original PDF

    SN74LV10ANSR Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV10A, SN74LV10A SCES338B 000-V A114-A) A115-A) SN54LV10A SN74LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E 000-V A114-A) A115-A) SN54LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A

    A115-A

    Abstract: C101 SN54LV10A SN74LV10A
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E 000-V A114-A) A115-A) SN54LV10A A115-A C101 SN54LV10A SN74LV10A

    LV10A

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV10A, SN74LV10A SCES338B SN54LV10A 000-V A114-A) A115-A) LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A

    A115-A

    Abstract: C101 SN54LV10A SN74LV10A
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E 000-V A114-A) A115-A) SN54LV10A A115-A C101 SN54LV10A SN74LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A

    A115-A

    Abstract: C101 SN54LV10A SN74LV10A
    Text: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV10A, SN74LV10A SCES338B SN54LV10A 000-V A114-A) A115-A) A115-A C101 SN54LV10A SN74LV10A

    74ls74apc

    Abstract: HD74ls04p 74LVC1G04ady8 semiconductor AZ431BZ-AE1 HCF4060BE HEF4093BP datasheet free download ne5334 hd74hc132p dm74ls47n
    Text: Standard Linear and Logic Products Cross-Reference Introduction Notice This Standard Linear and Logic Products CrossReference will assist in finding a device made by Texas Instruments that is a drop-in or similar replacement to many of our competitors’ standard linear and logic products.


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A

    SN54LV10A

    Abstract: SN74LV10A SN74LV10AD SN74LV10ADBR SN74LV10ADR SN74LV10ANSR SN74LV10APW SN74LV10APWR SN74LV10APWT
    Text: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338C – SEPTEMBER 2000 – REVISED JULY 2003 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 7 ns at 5 V Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV10A, SN74LV10A SCES338C SN54LV10A 000-V A114-A) A115-A) SN54LV10A SN74LV10A SN74LV10AD SN74LV10ADBR SN74LV10ADR SN74LV10ANSR SN74LV10APW SN74LV10APWR SN74LV10APWT

    A115-A

    Abstract: C101 SN54LV10A SN74LV10A
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E 000-V A114-A) A115-A) SN54LV10A A115-A C101 SN54LV10A SN74LV10A

    A115-A

    Abstract: C101 SN54LV10A SN74LV10A
    Text: SN54LV10A, SN74LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCES338B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV10A, SN74LV10A SCES338B SN54LV10A 000-V A114-A) A115-A) A115-A C101 SN54LV10A SN74LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D D D 1A 1B 2A 2B 2C 2Y GND <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV10A, SN74LV10A SCES338E SN54LV10A SN74LV10A LV10A