Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    RT54SX72S Search Results

    SF Impression Pixel

    RT54SX72S Price and Stock

    Actel Corporation RT54SX72S-1CQ256BX3

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Bristol Electronics RT54SX72S-1CQ256BX3 1
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 -
    		Get Quote

    Actel Corporation RT54SX72S-1CQ208B

    FIELD PROGRAMMABLE GATE ARRAY, 4024 CLBS, 108000 GATES, 185MHZ, 6036-CELL, CMOS, CQFP208
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components RT54SX72S-1CQ208B 1
    • 1 $1650
    • 10 $1650
    • 100 $1650
    • 1000 $1650
    • 10000 $1650
    		Buy Now

    RT54SX72S Datasheets (11)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    RT54SX72S Actel Logic and Timing, Using A54SX72A and RT54SX72S Quadrant Clocks Original PDF
    RT54SX72S-1CCQ256 Actel RadTolerant FPGAs for Space Applications Original PDF
    RT54SX72S-1CQ256B Actel RadTolerant FPGAs for Space Applications Original PDF
    RT54SX72S-1CQ256E Actel RadTolerant FPGAs for Space Applications Original PDF
    RT54SX72S-1MCQ256 Actel RadTolerant FPGAs for Space Applications Original PDF
    RT54SX72S-CCQ208 Actel RadTolerant FPGAs for Space Applications Original PDF
    RT54SX72S-CCQ256 Actel RadTolerant FPGAs for Space Applications Original PDF
    RT54SX72SCQ256B Actel RadTolerant FPGAs for Space Applications Original PDF
    RT54SX72SCQ256E Actel RadTolerant FPGAs for Space Applications Original PDF
    RT54SX72S-MCQ208 Actel RadTolerant FPGAs for Space Applications Original PDF
    RT54SX72S-MCQ256 Actel RadTolerant FPGAs for Space Applications Original PDF

    RT54SX72S Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    RT54SX72S

    Abstract: A54SX72A RT54SX-S Signal Path Designer
    Text: Techni c al Br i ef Using A54SX72A and RT54SX72S Quadrant Clocks Ar ch it e c tu r al Ov er vi ew The A54SX72A and RT54SX72S devices offer four quadrant clock networks QCLK0, 1, 2, and 3 that can be driven from external points or from internal logic signals within the


    Original     		PDF A54SX72A RT54SX72S RT54SX-S Signal Path Designer

    multiplexor

    Abstract: RT54SX72S RT54SX-S A54SX72A AC169 Signal Path Designer
    Text: Application Note AC169 Using A54SX72A and RT54SX72S Quadrant Clocks Ar ch it e c tu r al Ov er vi ew The A54SX72A and RT54SX72S devices offer four quadrant clock networks QCLK0, 1, 2, and 3 that can be driven from external points or from internal logic signals within the


    Original     		PDF AC169 A54SX72A RT54SX72S multiplexor RT54SX-S AC169 Signal Path Designer

    C4466

    Abstract: FG484 CQ256 FG144 D1425 ACTEL SI-SXA-APATQ100-A-KIT SI-SX72-ACQ256SFG484 A54SX72A C4002
    Text: 0HFKDQLFDO 'UDZLQJV IRU WKH $GDSWHU %RDUG S/N Package Device Actel Part Number 1 CQ256 to FG484 For A54SX72A and RT54SX72S devices SI-SX72-ACQ256SFG484 Ironwood Electronics Part Number: CQ256 to FG484 adapter for SX32 And SX72.pdf C4002


    Original     		PDF CQ256 FG484 A54SX72A RT54SX72S SI-SX72-ACQ256SFG484 FG484 C4002 com/docs/sockets/CQ256FG484adaptSX32 C4466 FG144 D1425 ACTEL SI-SXA-APATQ100-A-KIT SI-SX72-ACQ256SFG484 C4002

    verilog code for fir filter using DA

    Abstract: A3P1500 vhdl code of 32bit floating point adder digital FIR Filter verilog code digital FIR Filter VHDL code fir vhdl code FIR Filter verilog code vhdl code for floating point adder IQ GENERATOR CODE WITH VHDL RTAX2000
    Text: CoreFIR Finite Impulse Response FIR Filter Generator Product Summary Core Deliverables • Intended Use • – Finite Impulse Response (FIR) Filter for Actel FPGAs • Key Features • – • Self-Checking – Executable Tests Generated Output against Algorithm


    Original     		PDF

    HiRel a54sx72a unused

    Abstract: No abstract text available
    Text: Advanced v1.3 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LET th > 40, GEO SEU Rate < 10–10


    Original     		PDF RT54SX-S RT54SX-S TM1019 HiRel a54sx72a unused

    4 BIT ALU design with vhdl code using structural

    Abstract: RTAX1000S CORE8051 vhdl code for accumulator vhdl code for data memory 80C31 APA150-STD ASM51 R22-BH 80C31 instruction set
    Text: Core8051 Product Summary • Intended Use • • • Embedded System Control Communication System Control I/O Control • • • Key Features • • • • • • • • • Supported Families 100% ASM51 8051/80C31/80C51 Compatible Instruction Set 1


    Original     		PDF Core8051 ASM51 8051/80C31/80C51) 4 BIT ALU design with vhdl code using structural RTAX1000S CORE8051 vhdl code for accumulator vhdl code for data memory 80C31 APA150-STD ASM51 R22-BH 80C31 instruction set

    rt54sx32su

    Abstract: RTSX72 RTSX32SU RTSX72-S
    Text: Advanced v0.1 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case


    Original     		PDF TM1019 rt54sx32su RTSX72 RTSX32SU RTSX72-S

    Pin Compatibility Allows Prototyping with Commercial SX-A FPGAs

    Abstract: RT54SX72S-CQ256 RTSX32S
    Text: Advanced v 0.1.1 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 Additional SEU Hardened Flip-Flops Eliminate Software TMR Necessity LETth > 40, GEO SEU Rate <


    Original     		PDF RT54SX-S 100krad RT54SX-S Pin Compatibility Allows Prototyping with Commercial SX-A FPGAs RT54SX72S-CQ256 RTSX32S

    Untitled

    Abstract: No abstract text available
    Text: v2 . 1 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case


    Original     		PDF TM1019

    sx08a

    Abstract: No abstract text available
    Text: v4.0  SX-A Family FPGAs u e Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5V PCI, 5V TTL, 3.3V LVTTL, 2.5V LVCMOS2 • 2.5V, 3.3V, and 5V Mixed-Voltage Operation with 5V Input Tolerance and 5V Drive Strength • Devices Support Multiple Temperature Grades


    Original     		PDF

    TM101

    Abstract: No abstract text available
    Text: Advanced v1.2.3 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LETth > 40, GEO SEU Rate < 10–10


    Original     		PDF RT54SX-S 100krad RT54SX-S TM1019 TM101

    RTSX32su

    Abstract: Actel a54sx72a tid Silicon Sculptor II
    Text: v2.2 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case


    Original     		PDF TM1019 RTSX32su Actel a54sx72a tid Silicon Sculptor II

    A54SX16A

    Abstract: No abstract text available
    Text: v4.0  SX-A Family FPGAs u e Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5V PCI, 5V TTL, 3.3V LVTTL, 2.5V LVCMOS2 • 2.5V, 3.3V, and 5V Mixed-Voltage Operation with 5V Input Tolerance and 5V Drive Strength • Devices Support Multiple Temperature Grades


    Original     		PDF

    HiRel a54sx72a unused

    Abstract: No abstract text available
    Text: Advanced v1.6 RTSX-S RadTolerant FPGAs for Space Application S p ec i a l F e a tu r es fo r S p ac e • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LET th > 40, GEO SEU Rate < 10–10


    Original     		PDF TM1019 HiRel a54sx72a unused

    Untitled

    Abstract: No abstract text available
    Text: Core1553BRM v4.0 Handbook Microsemi Corporate Headquarters 2014 Microsemi Corporation. All rights reserved. Printed in the United States of America Part Number: 50200091-2 Release: January 2014 No part of this document may be copied or reproduced in any form or by any means without prior written consent of


    Original     		PDF Core1553BRM

    Untitled

    Abstract: No abstract text available
    Text: Advanced v0.1.1 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 Additional SEU Hardened Flip-Flops Eliminate Software TMR Necessity LETth > 40, GEO SEU Rate <


    Original     		PDF RT54SX-S 100krad

    Untitled

    Abstract: No abstract text available
    Text: v 2 .0 54SX Family FPGAs RadTolerant and HiRel Hig h D ens it y De vi ces Fe a t ur es • 16,000 and 32,000 Available Logic Gates Rad To ler ant 54S X Fam i ly • Tested Total Ionizing Dose TID Survivability Level • Up to 228 User I/Os • Radiation Performance to 100Krads (Si) (ICC Standby


    Original     		PDF 100Krads

    A54SX72* radiation

    Abstract: cg624 A54SX72A actel 1020 datasheet RT54SX72S RT54SX-S TM1019 HiRel a54sx72a unused
    Text: Advanced v1.4 RT54SX-S RadTolerant FPGAs for Space Applications S p ec i a l F e a tu r es fo r S p ac e • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LET th > 40, GEO SEU Rate < 10–10


    Original     		PDF RT54SX-S TM1019 A54SX72* radiation cg624 A54SX72A actel 1020 datasheet RT54SX72S RT54SX-S HiRel a54sx72a unused

    RT54SX72SCQ208

    Abstract: CQ208 AC195 SY-PQ208-2 A54SX72A-PQ208 ACTEL CCGA to FBGA Adapter RT54SX32SCQ208 RT54SX32S-CQ208 FG484 A54SX32APQ
    Text: Application Note AC195 Prototyping for the RTSX-S Enhanced Aerospace FPGA Introduction Actel provides radiation-tolerant FPGAs for space applications. However, since the enhanced environmental properties of radiation tolerant devices are not required during prototyping, inexpensive


    Original     		PDF AC195 RT54SX72SCQ208 CQ208 AC195 SY-PQ208-2 A54SX72A-PQ208 ACTEL CCGA to FBGA Adapter RT54SX32SCQ208 RT54SX32S-CQ208 FG484 A54SX32APQ

    ESD-S3.1

    Abstract: IC SEM 2005 RTSX32SU TM3015 TM3015.7 transistor N3B cmos esd sensitivity ionizer A54SX08A A54SX16A
    Text: Application Note AC233 Electro-Static Discharge Introduction All electronic integrated circuit IC devices are susceptible to damage from static electricity or electrostatic discharge (ESD). While some devices can withstand thousands of volts of ESD before damage, others


    Original     		PDF AC233 ESD-S3.1 IC SEM 2005 RTSX32SU TM3015 TM3015.7 transistor N3B cmos esd sensitivity ionizer A54SX08A A54SX16A

    54SX32A

    Abstract: 54SX72A ACTEL burn-in RT54SX72SCQ208 54SX32 AX54SX72A 54sx72a burn-in AC172 RT54SX32S-CQ208 A54SX72* radiation
    Text: Application Note AC172 Post-Programming Burn-In PPBI for Actel RT54SX-S and SX-A FPGAs A b s t r a ct A rc h i te c t ur e Burn-in (BI) for programmed Field Programmable Gate Arrays (FPGAs) is a growing concern in the space community. This application note addresses these concerns


    Original     		PDF AC172 RT54SX-S 54SX32A 54SX72A ACTEL burn-in RT54SX72SCQ208 54SX32 AX54SX72A 54sx72a burn-in AC172 RT54SX32S-CQ208 A54SX72* radiation

    ACTEL 1020B

    Abstract: 1010B 40MX 42MX A54SX72A AC207 RT54SX72S RH1020 actel 1020 RT54SX-S
    Text: Application Note AC207 Global Clock Networks in Actel Antifuse Devices System performance is one of the most important characteristics of a design. As a result, designers put a lot of effort into improving clock speed. Clock skew is often a limiting factor in attaining maximum


    Original     		PDF AC207 ACTEL 1020B 1010B 40MX 42MX A54SX72A AC207 RT54SX72S RH1020 actel 1020 RT54SX-S

    22B2 DIODE

    Abstract: A54SX08A A54SX16A A54SX32A A54SX72A PQ208 TQ100 TQ144 TQ176
    Text: v5.2 SX-A Family FPGAs u e Leading-Edge Performance • • • 250 MHz System Performance 350 MHz Internal Performance • • • Specifications • • • • • • 12,000 to 108,000 Available System Gates Up to 360 User-Programmable I/O Pins Up to 2,012 Dedicated Flip-Flops


    Original     		PDF

    RTSX32

    Abstract: 54SX A54SX16 A54SX32 RT54SX RT54SX72S RTSX16
    Text: v 2 .0 54SX Family FPGAs RadTolerant and HiRel Hig h D ens it y De vi ces Fe a t ur es • 16,000 and 32,000 Available Logic Gates Rad To ler ant 54S X Fam i ly • Tested Total Ionizing Dose TID Survivability Level • Up to 228 User I/Os • Radiation Performance to 100Krads (Si) (ICC Standby


    Original     		PDF 100Krads RTSX32 54SX A54SX16 A54SX32 RT54SX RT54SX72S RTSX16