RT3PE600L
Abstract: RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1
Text: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging
|
Original
|
PDF
|
MIL-STD-883
RT3PE600L
RT3PE3000L
AES-128
PAC10
LG484
ProASICPLUS Flash Family FPGAs Advanced v0.1
|
A3PE1500
Abstract: A3PE3000 IO23PDB0V2 IO23NDB0V2 IO30PDB1V1 IO05PDB0V0 IO06PDB0V1 IO32PDB1V1 IO10PDB0V1 IO283PDB7V1
Text: ProASIC3E Packaging 3 – Package Pin Assignments 208-Pin PQFP 1 208 208-Pin PQFP Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .
|
Original
|
PDF
|
208-Pin
A3PE600
IO112PDB6V1
IO85NPB5V0
A3PE1500
A3PE3000
IO23PDB0V2
IO23NDB0V2
IO30PDB1V1
IO05PDB0V0
IO06PDB0V1
IO32PDB1V1
IO10PDB0V1
IO283PDB7V1
|
A3PE3000L FG484
Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
Text: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for
|
Original
|
PDF
|
130-nm,
A3PE3000L FG484
Actel pdf on radio emitter
A3PE3000L
FG144
FG256
FG324
FG484
PQ208
TDP 245 Y
|
AFS600-FG256
Abstract: zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180
Text: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator
|
Original
|
PDF
|
130-nm,
128-Bit
AFS600-FG256
zo 103 ma 75 607
A54 ZENER
flashpro3 schematic
mark AT0
Unipolar PC atx 400 P4 power supply diagram
zener Diode B23
PQ208
QN108
QN180
|
729-Pin
Abstract: Axcelerator FPGAs AX125 IO126PB3F11 AG18 FBGA 896 896-Pin Axcelerator Family FPGAs
Text: Axcelerator Family FPGAs Package Pin Assignments 180-Pin CSP A1 Ball Pad Corner 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P Figure 3-1 • 180-Pin CSP Bottom View Note For Package Manufacturing and Environmental information, visit Resource center at
|
Original
|
PDF
|
180-Pin
AX125
IO32NB3F3
IO59NB5F5
729-Pin
Axcelerator FPGAs
IO126PB3F11
AG18
FBGA 896
896-Pin
Axcelerator Family FPGAs
|
AES-128
Abstract: FG256 FG484
Text: v2.0 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power
|
Original
|
PDF
|
130-nm,
AES-128
FG256
FG484
|
A54 ZENER
Abstract: AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM
Text: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents
|
Original
|
PDF
|
128-Bit
130-nm,
A54 ZENER
AFS600-FG256
mark AT0
QN108
CORE8051
bipolar ROM
|
ARMv6
Abstract: cortex a15 core Cortex-m1 Cortex R4 TRANSISTOR ww1 AES-128 FG256 FG484 T8 851
Text: v1.2 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power
|
Original
|
PDF
|
130-nm,
ARMv6
cortex a15 core
Cortex-m1
Cortex R4
TRANSISTOR ww1
AES-128
FG256
FG484
T8 851
|
a51 ZENER DIODE
Abstract: transistor 2n2222 bipolar ROM EQUIVALENCES TRANSISTOR LIST ProASIC3 lvds yl 1060
Text: Revision 3 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •
|
Original
|
PDF
|
130-nm,
128-Bit
a51 ZENER DIODE
transistor 2n2222
bipolar ROM
EQUIVALENCES TRANSISTOR LIST
ProASIC3 lvds
yl 1060
|
K524G2GACB-A050
Abstract: samsung "nand flash" derating K524G2GACB MCP 256M nand samsung mobile DDR nand flash DQS KF94 samsung MCP K5 transistor BA 92 samsung transistor 4gb nand flash SAMSUNG MCp nand ddr
Text: K524G2GACB-A050 MCP MEMORY MCP Specification 4Gb NAND Flash + 2Gb Mobile DDR INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
|
Original
|
PDF
|
K524G2GACB-A050
A10/AP
K524G2GACB-A050
samsung "nand flash" derating
K524G2GACB
MCP 256M nand samsung mobile DDR
nand flash DQS
KF94
samsung MCP K5
transistor BA 92 samsung transistor
4gb nand flash
SAMSUNG MCp nand ddr
|
Schematic
Abstract: DLP-2232H-SF
Text: DLP-2232H-SF LEAD FREE USB - MICRONTROLLER - FPGA MODULE FEATURES: • • • • • • • • • • Microsemi/Actel SmartFusion Customizable System-on-Chip cSoC FPGA Internal 100MHz, 32-Bit ARM Cortex™-M3 Microcontroller Subsystem (MSS) Internal 100MHz RC Oscillator-1% Accurate
|
Original
|
PDF
|
DLP-2232H-SF
100MHz,
32-Bit
100MHz
256Kbytes
64Kbytes
64-Mbit
50MHz
8/10/12-Bit
600KSPS
Schematic
DLP-2232H-SF
|
ICH5R
Abstract: No abstract text available
Text: Intel E8500 Chipset North Bridge NB Datasheet March 2005 Document Number: 306745-001 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
|
Original
|
PDF
|
E8500
ICH5R
|
AES-128
Abstract: FG256 FG484 ARMv6
Text: Revision 8 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze
|
Original
|
PDF
|
130-nm,
AES-128
FG256
FG484
ARMv6
|
RT3PE3000
Abstract: RT3PE600L RT3PE3000L CCGA AES-128 PAC10 IO72NDB4V0
Text: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging
|
Original
|
PDF
|
MIL-STD-883
RT3PE3000
RT3PE600L
RT3PE3000L
CCGA
AES-128
PAC10
IO72NDB4V0
|
|
LGA 478 SOCKET PIN LAYOUT
Abstract: RTAX2000
Text: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg
|
Original
|
PDF
|
TM1019
LGA 478 SOCKET PIN LAYOUT
RTAX2000
|
Untitled
Abstract: No abstract text available
Text: Advanced v0.3 RTAX-S Family FPGAs Sp e ci a l F ea t ur es f o r Sp a ce • Up to 10,752 SEU Hardened Flip-Flops Eliminate Software TMR Necessity >LET th 37 LET, GEO SEU Rate <10-10 Errors/Bit-Day • Expected SRAM Upset Rate of <10-10 Errors/Bit-Day with
|
Original
|
PDF
|
32-Bits
114specifications
|
connect usb in vcd player circuit diagram
Abstract: DIODE MARKING 534
Text: IGLOOe Handbook IGLOOe Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – IGLOOe Datasheet IGLOOe Low-Power Flash FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
|
Original
|
PDF
|
|
RTAX2000
Abstract: TB125 24mA-drive 352-Pin
Text: RTAX-S RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment Clamp Diode Hot Insertion 5V Tolerance Input Buffer Output Buffer LVTTL No Yes No Enabled/Disabled 3.3V PCI Yes No Yes1 Enabled/Disabled LVCMOS2.5V No Yes
|
Original
|
PDF
|
JESD8-11)
RTAX2000
TB125
24mA-drive
352-Pin
|
A3PE3000L
Abstract: A3PE600L
Text: v1.0 Military ProASIC 3/EL Low-Power Flash FPGAs ® with Flash*Freeze Technology Advanced and Pro Professional I/Os†† Features and Benefits Military Temperature Tested and Qualified • Each Device Tested from –55°C to 125°C Firm-Error Immune •
|
Original
|
PDF
|
|
RD-172
Abstract: M6 transistor gaa 716 IO127NDB7V1 IO32PDB1V1 flashpro3 equivalent ZO 607 A3PE600
Text: v2.0 ProASIC 3E Flash Family FPGAs ® with Optional Soft ARM® Support Features and Benefits Pro Professional I/O High Capacity • • • 600 k to 3 Million System Gates 108 to 504 kbits of True Dual-Port SRAM Up to 616 User I/Os Reprogrammable Flash Technology
|
Original
|
PDF
|
130-nm,
64-Bit
128-Bit
RD-172
M6 transistor
gaa 716
IO127NDB7V1
IO32PDB1V1
flashpro3
equivalent ZO 607
A3PE600
|
RTAX2000
Abstract: footprint cqfp 280 RTAX1000S actel cqfp 84
Text: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
|
Original
|
PDF
|
TM1019
RTAX2000
footprint cqfp 280
RTAX1000S
actel cqfp 84
|
Untitled
Abstract: No abstract text available
Text: v1.3 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power
|
Original
|
PDF
|
130-nm,
|
equivalent ZO 607
Abstract: JESD 201 class 1A crystal k 1058 mosfet
Text: Advanced v0.8 Fusion Family of Mixed-Signal Flash FPGAs ® with Optional Soft ARM Support Features and Benefits Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • • Advanced 130-nm, 7-Layer Metal, Flash-Based CMOS Process
|
Original
|
PDF
|
130-nm,
32-Bit
12-Bit
equivalent ZO 607
JESD 201 class 1A crystal
k 1058 mosfet
|
RGB444x
Abstract: No abstract text available
Text: VmodCAM Reference Manual Revision: July 19, 2011 Note: This document applies to REV C of the board. 1300 NE Henley Court, Suite 3 Pullman, WA 99163 509 334 6306 Voice | (509) 334 6300 Fax Overview The VmodCAM board provides digital imaging capabilities for any Digilent FPGA system
|
Original
|
PDF
|
MT9D112
IO10-P
IO10-N
IO11-P
IO11-N
IO13-P
IO13-N
IO14-P
IO14-N
IO15-P
RGB444x
|