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    IO05PDB0V0 Search Results

    IO05PDB0V0 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    RT3PE600L

    Abstract: RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1
    Text: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging


    Original     		PDF MIL-STD-883 RT3PE600L RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1

    A3PE1500

    Abstract: A3PE3000 IO23PDB0V2 IO23NDB0V2 IO30PDB1V1 IO05PDB0V0 IO06PDB0V1 IO32PDB1V1 IO10PDB0V1 IO283PDB7V1
    Text: ProASIC3E Packaging 3 – Package Pin Assignments 208-Pin PQFP 1 208 208-Pin PQFP Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .


    Original     		PDF 208-Pin A3PE600 IO112PDB6V1 IO85NPB5V0 A3PE1500 A3PE3000 IO23PDB0V2 IO23NDB0V2 IO30PDB1V1 IO05PDB0V0 IO06PDB0V1 IO32PDB1V1 IO10PDB0V1 IO283PDB7V1

    A3PE3000L FG484

    Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
    Text: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for


    Original     		PDF 130-nm, A3PE3000L FG484 Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y

    AFS600-FG256

    Abstract: zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180
    Text: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator


    Original     		PDF 130-nm, 128-Bit AFS600-FG256 zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180

    AES-128

    Abstract: FG256 FG484
    Text: v2.0 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power


    Original     		PDF 130-nm, AES-128 FG256 FG484

    A54 ZENER

    Abstract: AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM
    Text: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents


    Original     		PDF 128-Bit 130-nm, A54 ZENER AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM

    ARMv6

    Abstract: cortex a15 core Cortex-m1 Cortex R4 TRANSISTOR ww1 AES-128 FG256 FG484 T8 851
    Text: v1.2 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power


    Original     		PDF 130-nm, ARMv6 cortex a15 core Cortex-m1 Cortex R4 TRANSISTOR ww1 AES-128 FG256 FG484 T8 851

    a51 ZENER DIODE

    Abstract: transistor 2n2222 bipolar ROM EQUIVALENCES TRANSISTOR LIST ProASIC3 lvds yl 1060
    Text: Revision 3 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •


    Original     		PDF 130-nm, 128-Bit a51 ZENER DIODE transistor 2n2222 bipolar ROM EQUIVALENCES TRANSISTOR LIST ProASIC3 lvds yl 1060

    Schematic

    Abstract: DLP-2232H-SF
    Text: DLP-2232H-SF LEAD FREE USB - MICRONTROLLER - FPGA MODULE FEATURES: • • • • • • • • • • Microsemi/Actel SmartFusion Customizable System-on-Chip cSoC FPGA Internal 100MHz, 32-Bit ARM Cortex™-M3 Microcontroller Subsystem (MSS) Internal 100MHz RC Oscillator-1% Accurate


    Original     		PDF DLP-2232H-SF 100MHz, 32-Bit 100MHz 256Kbytes 64Kbytes 64-Mbit 50MHz 8/10/12-Bit 600KSPS Schematic DLP-2232H-SF

    AES-128

    Abstract: FG256 FG484 ARMv6
    Text: Revision 8 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze


    Original     		PDF 130-nm, AES-128 FG256 FG484 ARMv6

    RT3PE3000

    Abstract: RT3PE600L RT3PE3000L CCGA AES-128 PAC10 IO72NDB4V0
    Text: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging


    Original     		PDF MIL-STD-883 RT3PE3000 RT3PE600L RT3PE3000L CCGA AES-128 PAC10 IO72NDB4V0

    A3PE600

    Abstract: No abstract text available
    Text: v1.0 ProASIC3E Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits High Capacity • 600 k to 3 Million System Gates • 108 to 504 kbits of True Dual-Port SRAM • Up to 620 User I/Os Reprogrammable Flash Technology • • • •


    Original     		PDF 130-nm, 64-Bit 128-Bit A3PE600

    connect usb in vcd player circuit diagram

    Abstract: DIODE MARKING 534
    Text: IGLOOe Handbook IGLOOe Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – IGLOOe Datasheet IGLOOe Low-Power Flash FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I


    Original     		PDF

    A3PE3000L

    Abstract: A3PE600L
    Text: v1.0 Military ProASIC 3/EL Low-Power Flash FPGAs ® with Flash*Freeze Technology Advanced and Pro Professional I/Os†† Features and Benefits Military Temperature Tested and Qualified • Each Device Tested from –55°C to 125°C Firm-Error Immune •


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: v1.3 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power


    Original     		PDF 130-nm,

    equivalent ZO 607

    Abstract: JESD 201 class 1A crystal k 1058 mosfet
    Text: Advanced v0.8 Fusion Family of Mixed-Signal Flash FPGAs ® with Optional Soft ARM Support Features and Benefits Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • • Advanced 130-nm, 7-Layer Metal, Flash-Based CMOS Process


    Original     		PDF 130-nm, 32-Bit 12-Bit equivalent ZO 607 JESD 201 class 1A crystal k 1058 mosfet

    pacer oled pmo13701

    Abstract: PMO13701 SSD0300 LOG rx1a
    Text: ProASIC3/E Starter Kit User’s Guide ProASIC3/E Starter Kit User’s Guide Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Document Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5


    Original     		PDF

    IO191

    Abstract: vhdl code for fifo and transmitter actel FG484 package mechanical drawing
    Text: ProASIC 3L Low-Power Handbook ProASIC3L Low-Power Flash Device Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – ProASICL Low-Power Datasheet


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: Radiation-Tolerant ProASIC 3 Handbook Radiation-Tolerant ProASIC3 Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – Radiation-Tolerant ProASIC3 FPGAs Datasheet


    Original     		PDF

    IO32PDB1V1

    Abstract: IO283PDB7V1
    Text: IGLOO e Datasheet P ro du c t Br ie f 1 – IGLOO™e Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V or 1.5 V Core Voltage for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation from 25 µW


    Original     		PDF 130-nm, IO32PDB1V1 IO283PDB7V1

    IO32PDB1V1

    Abstract: No abstract text available
    Text: IGLOOe Datasheet P ro du c t Br ie f 1 – IGLOO e Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V or 1.5 V Core Voltage for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation from 25 µW


    Original     		PDF 130-nm, 128-BiLE3000 IO250PDB6V2 IO250NDB6V2 IO246PDB6V1 IO247NDB6V1 IO247PDB6V1 IO249NPB6V1 IO245PDB6V1 IO253NDB6V2 IO32PDB1V1

    Untitled

    Abstract: No abstract text available
    Text: Revision 2 Extended Temperature Fusion Family of Mixed Signal FPGAs Features and Benefits • Extended Temperature Tested • Each Device Tested from –55°C to 100°C Junction Temperature High-Performance Reprogrammable Flash Technology • • • • Advanced 130-nm, 7-Layer Metal, Flash-Based CMOS Process


    Original     		PDF 130-nm, 32-Bit 12-Bit

    microsemi FG324

    Abstract: No abstract text available
    Text: Revision 11 ProASIC3E Flash Family FPGAs with Optional Soft ARM Support Features and Benefits Pro Professional I/O • • • • High Capacity • 600 k to 3 Million System Gates • 108 to 504 kbits of True Dual-Port SRAM • Up to 620 User I/Os Reprogrammable Flash Technology


    Original     		PDF 130-nm, 64-Bit 128-Bit microsemi FG324

    A2F060

    Abstract: No abstract text available
    Text: Revision 10 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)


    Original     		PDF 32-Bit A2F060