FCT329 Search Results

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Catalog Datasheet	MFG & Type	PDF	Document Tags
FCT3932 Abstract: IDT74FCT32932-100 IDT74FCT3932-100 LNK14 Text: IDT74FCT3932-100, FCT32932-100 LOW SKEW PLL-BASED CLOCK DRIVER COMMERCIAL TEMPERATURE RANGES IDT74FCT3932-100 FCT32932-100 3.3V LOW SKEW PLL-BASED ADVANCE INFORMATION CMOS CLOCK DRIVER Integrated Device Technology, Inc. FEATURES: • • • •	Original	PDF	IDT74FCT3932-100, IDT74FCT32932-100 IDT74FCT3932-100 FCT3932 FCT32932 100MHz FCT3932 IDT74FCT32932-100 IDT74FCT3932-100 LNK14
Untitled Abstract: No abstract text available Text: ADVANCE P54/FCT32952A/C P54/FCT32953A/C 3.3V SSOP QSOP NOTEBOOK LOGIC OCTAL REGISTERED TRANSCEIVER INFORMATION FEATURES Edge-rate Control Circuitry for Significantly Improved Noise Characteristics ESD protection exceeds 2000V 64 mA Sink Current (Com’l), 48 mA (Mil)	OCR Scan	PDF	P54/74FCT32952A/C P54/74FCT32953A/C FCT32952 FCT32953. FCT32953
FCT329 Abstract: No abstract text available Text: IDT74FCT3932-100 FCT32932-100 3.3V LOW SKEW PLL-BASED ADVANCE INFORMATION CMOS CLOCK DRIVER Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • 0.5 MICRON CM O S Technology Guaranteed low skew 16 program m able frequency configurations	OCR Scan	PDF	IDT74FCT3932-100 IDT74FCT32932-100 FCT3932 FCT32932 100MHz FCT393E 10-3M-20T0 46B5771 00E111S FCT329
fdk vco Abstract: vco fdk Text: IDT74FCT3932 3.3V LOW SKEW PLL-BASED ADVANCE INFORMATION CMOS CLOCK DRIVER Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • path delay should be made to match this output path delay. The PLL consists of the phase/frequency detector, charge	OCR Scan	PDF	IDT74FCT3932 FCT3932 100MHz 10-3M-20T0 46B5771 00E1112 fdk vco vco fdk
Untitled Abstract: No abstract text available Text: P54/FCT32952C/D P54/FCT32953C/D 3.3 VOLT OCTAL REGISTERED TRANSCEIVER À FEATURES • Function and Drive Compatible with the Fastest TTL Logic ■ Edge-rate Control Circuitry for Significantly Improved Noise Characteristics ■ Inputs and Outputs Interface with TTL Logic	OCR Scan	PDF	P54/74FCT32952C/D P54/74FCT32953C/D MIL-STD-883, 2952C 2953C 2952D 2953D AE1741-2
Untitled Abstract: No abstract text available Text: P54/FCT32952C/D P54/FCT32953C/D 3.3 VOLT OCTAL REGISTERED TRANSCEIVER 7<- FEATURES	OCR Scan	PDF	P54/74FCT32952C/D P54/74FCT32953C/D 2952C 2953C 2952D 2953D MIL-STD-883, AE1741-2 P54/74FCT32953C/D
Untitled Abstract: No abstract text available Text: P54/FCT32952A/C advance P54/FCT32953A/C 3.3V SSOP QSOP NOTEBOOK LOGIC OCTAL REGISTERED TRANSCEIVER in fo r m a tio n À-FEATURES • Edge-rate Control Circuitry for Significantly Improved Noise Characteristics	OCR Scan	PDF	P54/74FCT32952A/C P54/74FCT32953A/C SSOP150) P54/74FCT32953A/C
ic 1741 Abstract: 2952c Text: 4MN 15 m i P54/FCT32952C/D P54/FCT32953C/D OCTAL REGISTERED TRANSCEIVER FEATURES • Function and Drive Compatible with the Fastest TTL Logic ■ Edge-rate Control Circuitry for Significantly Improved Noise Characteristics ■ inputs and Outputs Interface with TTL Logic	OCR Scan	PDF	P54/74FCT32952C/D P54/74FCT32953C/D FCT32952 FCT32953 2952C 2953C 2952D 2953D MIL-STD-883, AE1741-2 ic 1741
fdk vco Abstract: fdk vco IM vco fdk Text: IDT74FCT3932 3.3V LOW SKEW PLL-BASED ADVANCE INFORMATION CMOS CLOCK DRIVER ì it e g i a t s d D ev ± ;e T ech n o lo g y , In c. FEATURES: • • • • • • • • • • • path delay should be made to match this output path delay. The PLL consists of the phase/frequency detector, charge	OCR Scan	PDF	IDT74FCT3932 FCT3932 100MHz FCT32932 fdk vco fdk vco IM vco fdk