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    74LVC3G34DC Search Results

    74LVC3G34DC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SN74LVC3G34DCUR Texas Instruments Triple Buffer Gate 8-VSSOP -40 to 125 Visit Texas Instruments Buy
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    SN74LVC3G34DCUTG4 Texas Instruments Triple Buffer Gate 8-VSSOP -40 to 125 Visit Texas Instruments Buy
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    74LVC3G34DC Price and Stock

    Texas Instruments SN74LVC3G34DCTR

    IC BUFFER NON-INVERT 5.5V SM8
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    DigiKey SN74LVC3G34DCTR Digi-Reel 15,448 1
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    Texas Instruments SN74LVC3G34DCUR

    IC BUFFER NON-INVERT 5.5V 8VSSOP
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    Nexperia 74LVC3G34DC,125

    IC BUF NON-INVERT 5.5V 8VSSOP
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    DigiKey 74LVC3G34DC,125 Digi-Reel 2,253 1
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    Texas Instruments SN74LVC3G34DCUT

    IC BUFFER NON-INVERT 5.5V 8VSSOP
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    74LVC3G34DC Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC3G34DC NXP Semiconductors Triple buffer Original PDF
    74LVC3G34DC Philips Semiconductors Original PDF
    74LVC3G34DC,125 NXP Semiconductors 74LVC3G34 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8, Gate Original PDF
    74LVC3G34DC,125 NXP Semiconductors Triple buffer - Description: 3.3V Triple PicoGate Buffer ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: +/- 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: [email protected] ns; Voltage: 1.65-5.5; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse Original PDF
    74LVC3G34DC-G NXP Semiconductors 74LVC3G34DC - Triple buffer - Description: 3.3V Triple PicoGate Buffer ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: +/- 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: [email protected] ns; Voltage: 1.65-5.5 Original PDF
    74LVC3G34DC-G NXP Semiconductors Triple buffer - Description: 3.3V Triple PicoGate Buffer ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: +/- 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: [email protected] ns; Voltage: 1.65-5.5 Original PDF
    74LVC3G34DC-Q100 NXP Semiconductors Triple buffer Original PDF
    74LVC3G34DC-Q100125 NXP Semiconductors BUFFER, LVC/LCX/Z SERIES Original PDF
    74LVC3G34DC-Q100H NXP Semiconductors 74LVC3G34DC-Q100 - 74LVC3G34DC-Q100 - Triple buffer Original PDF

    74LVC3G34DC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer gate Rev. 01 — 29 April 2004 Product data sheet 1. General description The 74LVC3G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of


    Original     		PDF 74LVC3G34 74LVC3G34

    NC7NZ34K8

    Abstract: 74LVC3G34 NC7NP34 NC7NZ34 SN74AUP3G34 SN74LVC3G34 "MARKING CODE" 3Y SN74LVC3G34DCTR
    Text: SLG74LB3G34 GreenLIBTM TRIPLE BUFFER GATE General Description Features The GreenLIB provides the triple buffer gate. This device is • Pb-Free / RoHS Compliant fully specified for partial-power-down applications using Ioff. • Halogen-Free The Ioff circuitry disables the outputs, preventing damaging


    Original     		PDF SLG74LB3G34 000-0074LB3G34-11 NC7NZ34K8 74LVC3G34 NC7NP34 NC7NZ34 SN74AUP3G34 SN74LVC3G34 "MARKING CODE" 3Y SN74LVC3G34DCTR

    74LVC3G34

    Abstract: 74LVC3G34DC 74LVC3G34DP 74LVC3G34GD 74LVC3G34GM 74LVC3G34GT
    Text: 74LVC3G34 Triple buffer Rev. 8 — 2 September 2010 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G34 74LVC3G34 74LVC3G34DC 74LVC3G34DP 74LVC3G34GD 74LVC3G34GM 74LVC3G34GT

    diode MARKING A1 v34

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer gate Rev. 02 — 27 October 2004 Product data sheet 1. General description The 74LVC3G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of


    Original     		PDF 74LVC3G34 74LVC3G34 diode MARKING A1 v34

    74LVC3G34

    Abstract: 74LVC3G34DC 74LVC3G34DP 74LVC3G34GM 74LVC3G34GT JESD22-A114E MO-187
    Text: 74LVC3G34 Triple buffer Rev. 05 — 5 October 2007 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G34 74LVC3G34 74LVC3G34DC 74LVC3G34DP 74LVC3G34GM 74LVC3G34GT JESD22-A114E MO-187

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34-Q100 Triple buffer Rev. 1 — 16 May 2013 Product data sheet 1. General description The 74LVC3G34-Q100 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34-Q100 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G34-Q100 74LVC3G34-Q100 AEC-Q100 74LVC3G34

    74LVC3G34

    Abstract: 74LVC3G34DC 74LVC3G34DP 74LVC3G34GD 74LVC3G34GM 74LVC3G34GT JESD22-A114E MO-187
    Text: 74LVC3G34 Triple buffer Rev. 07 — 9 May 2008 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G34 74LVC3G34 74LVC3G34DC 74LVC3G34DP 74LVC3G34GD 74LVC3G34GM 74LVC3G34GT JESD22-A114E MO-187

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer Rev. 9 — 23 November 2011 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G34 74LVC3G34

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer Rev. 10 — 8 August 2012 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G34 74LVC3G34 JESD8B/JESD36

    *AG083

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer gate Rev. 04 — 2 March 2007 Product data sheet 1. General description The 74LVC3G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of


    Original     		PDF 74LVC3G34 74LVC3G34 *AG083

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer Rev. 06 — 12 March 2008 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G34 74LVC3G34 JESD8B/JESD36

    3G34

    Abstract: 74LVC3G34 74LVC3G34DC 74LVC3G34DP 74LVC3G34GT MO-187 diode MARKING A1 v34
    Text: 74LVC3G34 Triple buffer gate Rev. 03 — 31 January 2005 Product data sheet 1. General description The 74LVC3G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of


    Original     		PDF 74LVC3G34 74LVC3G34 3G34 74LVC3G34DC 74LVC3G34DP 74LVC3G34GT MO-187 diode MARKING A1 v34

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G34 Triple buffer Rev. 11 — 2 April 2013 Product data sheet 1. General description The 74LVC3G34 provides three buffers. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G34 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC3G34 74LVC3G34 JESD8B/JESD36