Untitled
Abstract: No abstract text available
Text: QuickSw itch P r o d u c ts q s 3v h i 25 3.3V Quad Active Low Switch for Hot SwaP Applications HotSwitch Semiconductor , I nc . FEATURES/BENEFITS DESCRIPTION • The QS3VH125 HotSwitch Quad bus switch is specially designed for hot-swapping environment.
|
OCR Scan
|
PDF
|
QS3VH125
200ps
74bfeifl03
|
Untitled
Abstract: No abstract text available
Text: TS\ High-Performance CMOS Two-by-Two Analog S iconducior , I nc . qs4A2oiq C r0 S S P o in t s w it c h FEATURES GENERAL DESCRIPTION • Low On-resistance: rDS on = 5i2 • Fast transition time: tTRAN = 6ns • Wide bandwidth: 1,3GHz (-3dB point) • Crosstalk:
|
OCR Scan
|
PDF
|
50KHz,
30MHz
30MHz,
QS4A201Q
PSS-28A
74bfeifl03
|
74BF
Abstract: No abstract text available
Text: eg L o w Skew T T L P L L Clock Driver With Integrated Loop Filter Q u a lit y S em ico n d u cto r , I n c . QS5931T ADVANCE INFORMATION DESCRIPTION FEATURES/BENEFITS Six low noise TTL level outputs Q outputs, Q/2 output <250ps output skew, Q0-Q4 Outputs 3-state and reset while OE/RST low
|
OCR Scan
|
PDF
|
QS5931T
250ps
80MHz
74bfeifl03
74BF
|
Untitled
Abstract: No abstract text available
Text: Q u a lity Sem iconductor, Inc. 3.3V Programmable Skew qssv993 PLL Clock Driver m p r e l im in a r y T u r b O u lO C k FEATURES/BENEFITS DESCRIPTION • The QS5V99X family is a high fanout 3.3V PLL based clock driver intended for high performance computing
|
OCR Scan
|
PDF
|
qssv993
QS5V99X
S5V991:
32-pin
QS5V993:
28-pin
200ps
250ps
75MHz
85MHz
|
Untitled
Abstract: No abstract text available
Text: QuickSwitch Products QuickScan SemcIuctor. I nc . 8 ' B qs3J245 Universal JTAG Access Port With Output Enable i t FEATURES/BENEFITS DESCRIPTION • IEEE 1149.1 a-1993 JTAG compliant The QS3J245 JTAG QuickScan device is designed to provide JTAG access to data, address, and
|
OCR Scan
|
PDF
|
qs3J245
a-1993
QS3J245
004in.
74bbfl03
0Q0375E
|
Untitled
Abstract: No abstract text available
Text: High-Performance Q q s 4 a io s q CMOS Two Channel 4PST Switch Q u a lit y S em ico n d u cto r , I n c . FEATURES GENERAL DESCRIPTION • Low on-resistance: rDS on = 5i2 • Wide bandwidth: 1,3GHz (-3d B point) • Crosstalk: -1 OOdB @ 50KHz, -7 0 d B @ 5MHz,
|
OCR Scan
|
PDF
|
50KHz,
30MHz
30MHz,
QS4A105Q
PSS-28A
74bfeifl03
|
PA 0016 diagram
Abstract: No abstract text available
Text: 3.3V SYNC DRAM PLL Clock Driver Q QS5920A PRELIMINARY Q u a l it y S em ico nducto r , I n c . FEATURES/BENEFITS DESCRIPTION • Intel PC100/Spread Spectrum compliant • 11 outputs • Balanced Drive Outputs ± 1 2 mA • Synchronous output enable sOE control for
|
OCR Scan
|
PDF
|
QS5920A
PC100/Spread
33MHz
100MHz
24-pin
PC-100
MO-153EE
PSS-56C
bfl03
PA 0016 diagram
|
Untitled
Abstract: No abstract text available
Text: GB to.DucTOR.iNc QuickSw itch P r o d u c ts q s 3v h i 26 3.3V Quad Active High Switch for Hot SwaP Applications HotSwitch FEATURES/BENEFITS DESCRIPTION • N channel FET switches with no parasitic diode to Vcc - No DC path to Vcc or GND - 5V tolerant in OFF state
|
OCR Scan
|
PDF
|
data-150MHz
QS3VH126
PSS-28A
MO-137AE
74bfeifl03
|
Untitled
Abstract: No abstract text available
Text: VS] \?4 S e m ic o n d u c to r In c QuickSwitch Products High-Speed CMOS SynchroSwitch Dual 4:1 MUX/DeiTlUX With Optional Active Terminators QS3ST253 Qo c ? S S INFORMATION FEATURES/BENEFITS DESCRIPTION • The QS3S253 and QS3ST253 are high speed CMOS
|
OCR Scan
|
PDF
|
QS3ST253)
QS3S253
QS3ST253
250ps
PSS-28A
74bfeifl03
|
Untitled
Abstract: No abstract text available
Text: % QUALITy Semiconductor I nc Low Skew CMOS P LLL Clock Driver With • ■ . . . _ Integrated Loop Filter QS5931 1K1 INFORMATION FEATURES/BENEFITS DESCRIPTION • • • • • • • The QS5931 Clock Driver uses an internal phase locked loop PLL to lock low skew outputs to a
|
OCR Scan
|
PDF
|
QS5931
QS5931
500ps
PSS-28A
MO-137AE
74bfeifl03
|
Untitled
Abstract: No abstract text available
Text: sS ro T o m High-Performance CMOS Two-Channel SP4T Mux/Demux qs 4A2ioq FEATURES GENERAL DESCRIPTION • Low On-resistance: rDS on = 5i2 • Fast transition time: tTRAN = 6ns • Wide bandwidth: 700MHz (-3dB point) • Crosstalk: -1 1 0dB @ 50KHz, -68 dB @ 5MHz,
|
OCR Scan
|
PDF
|
700MHz
50KHz,
30MHz
30MHz,
QS4A210Q
PSS-28A
74bfeifl03
|
Untitled
Abstract: No abstract text available
Text: Semiconductor , I nc QuickSwitch Products q s 3388 High-Speed CMOS PUS Exchange Switches With Active Termination pus Hold QS3L388 FEATURES/BENEFITS DESCRIPTION • The QS3388 (standard power) and QS3L388 (low power) provide ten high-speed CMOS TTL compat
|
OCR Scan
|
PDF
|
S3L388
QS3388
QS3L388
3388/3L388
Ena150
PSS-28A
74bfeifl03
|
Untitled
Abstract: No abstract text available
Text: 3.3V SYNC DRAM PLL Clock Driver Q QS5920 Q uality S emiconductor , In c . FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • The QS5920 is a high-performance, low skew, low jitter, multiple output phase locked loop clock driver. It provides precise phase and frequency alignment of
|
OCR Scan
|
PDF
|
QS5920
QS5920
33MHz
125MHz
may-24C
74bbA03
000375b
|
Untitled
Abstract: No abstract text available
Text: TS\ ì?4 High-Performance CMOS Two-Channel 5PST Switch Semiconductor , I nc . q s 4a h o q FEATURES GENERAL DESCRIPTION • Low on-resistance: rDS on = 5i2 • Wide bandwidth: 1,8GHz (-3dB point) • Crosstalk: -1 OOdB @ 50KHz, -7 0 d B @ 5MHz, -5 5 d B @ 30MHz
|
OCR Scan
|
PDF
|
50KHz,
30MHz
30MHz,
QS4A110Q
PSS-28A
MO-137AE
74bfeifl03
|
|
|
Untitled
Abstract: No abstract text available
Text: Tg] QuickSwitch Products S e m ic o n d u c to r Inc. High-Speed CMOS SynchroSwitch QUad 2 :1 M U X /D eiT lU X With Optional Active Terminators QS3ST257 A^ NC^ INFORMATION FEATURES/BENEFITS DESCRIPTION • The QS3ST257 is a high speed CMOS Quad 2:1
|
OCR Scan
|
PDF
|
S3ST257)
QS3ST257
250ps
Clo57
PSS-28A
74bfeifl03
|
Untitled
Abstract: No abstract text available
Text: Quality Semiconductor, I nc . High-Performance CMOS Analog Four-Channel SPST Switch With Individual Enables QS4A101Q FEATURES GENERAL DESCRIPTION • Low On-resistance: rDS on = 5i2 • Wide bandwidth: 1,4GHz (-3dB point) • Crosstalk: - 1 22dB @ 50KHz, -80dB @ 5MHz,
|
OCR Scan
|
PDF
|
QS4A101Q
50KHz,
-80dB
-65dB
30MHz
-75dB
-45dB
30MHz,
QS4A101Q
|
Untitled
Abstract: No abstract text available
Text: 5 s iconducior,inc. Low Skew CMOS PLL Clock Driver With Integrated Loop Filter QS5930 FEATURES DESCRIPTION • • • • • • • • • • • • The QS5930 Clock Driver uses an internal phase locked loop (PLL to lock low skew outputs to a reference clock input. Six outputs are available: Q4Q0, and Q/2. Careful layout and design insures less
|
OCR Scan
|
PDF
|
QS5930
250ps
20-pin
-300mA
QS5930
74bfeifl03
|