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    74AUP2G86GT Search Results

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    74AUP2G86GT Price and Stock

    Nexperia 74AUP2G86GT,115

    IC GATE XOR 2CH 2-INP 8XSON
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    DigiKey 74AUP2G86GT,115 Digi-Reel 1
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    74AUP2G86GT,115 Cut Tape 1
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    74AUP2G86GT,115 Reel 5,000
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    Avnet Americas 74AUP2G86GT,115 Reel 6 Weeks 5,000
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    Mouser Electronics 74AUP2G86GT,115
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    Verical 74AUP2G86GT,115 89,908 1,858
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    Rochester Electronics 74AUP2G86GT,115 89,908 1
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    TTI 74AUP2G86GT,115 Reel 5,000
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    EBV Elektronik 74AUP2G86GT,115 8 Weeks 5,000
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    Rochester Electronics LLC 74AUP2G86GT,115

    IC GATE XOR
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    DigiKey 74AUP2G86GT,115 Bulk 1,519
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    NXP Semiconductors 74AUP2G86GT,115

    XOR Gate 2-Element 2-IN CMOS 8-Pin XSON T/R
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    Verical 74AUP2G86GT,115 39,583 1,858
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    74AUP2G86GT,115 14,469 1,858
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    Rochester Electronics 74AUP2G86GT,115 54,052 1
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    74AUP2G86GT Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP2G86GT NXP Semiconductors Low-power dual 2-input EXCLUSIVE-OR gate Original PDF
    74AUP2G86GT NXP Semiconductors 74AUP2G86 - IC AUP/ULP/V SERIES, DUAL 2-INPUT XOR GATE, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT833-1, SON-8, Gate Original PDF
    74AUP2G86GT,115 NXP Semiconductors Low-power dual 2-input EXCLUSIVE-OR gate; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" Original PDF
    74AUP2G86GT,115 NXP Semiconductors 74AUP2G86 - IC AUP/ULP/V SERIES, DUAL 2-INPUT XOR GATE, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT833-1, SON-8, Gate Original PDF

    74AUP2G86GT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LVC2G86

    Abstract: NC7WP86 NC7WZ86 NL27WZ86 SN74AUC2G86 SN74LVC2G86 SN74AUC2G86DCTR NXP lot marking
    Text: SLG74LB2G86 GreenLIBTM DUAL 2-INPUT EXCLUSIVE-OR GATE General Description Features The GreenLIB provides the dual 2-input Exclusive-OR • Pb-Free / RoHS Compliant function. • Halogen-Free • TDFN-8 Package • Low static power consumption IDD = 1A •


    Original     		PDF SLG74LB2G86 NC7WP86 NC7WZ86 74AUP2G86 74LVC2G86 NL27WZ86 NLX2G86 000-0074LB2G86-11 SN74AUC2G86 SN74LVC2G86 SN74AUC2G86DCTR NXP lot marking

    74AUP2G86DC

    Abstract: 74AUP2G86GT JESD22-A114E JESD78
    Text: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 04 — 29 June 2009 Product data sheet 1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G86 74AUP2G86 74AUP2G86DC 74AUP2G86GT JESD22-A114E JESD78

    marking code p86

    Abstract: No abstract text available
    Text: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 01 — 9 October 2006 Product data sheet 1. General description The 74AUP2G86 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74AUP2G86 74AUP2G86 marking code p86

    74AUP2G86DC

    Abstract: 74AUP2G86GM 74AUP2G86GT JESD22-A114E JESD78
    Text: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 02 — 19 March 2008 Product data sheet 1. General description The 74AUP2G86 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74AUP2G86 74AUP2G86 74AUinitions 74AUP2G86DC 74AUP2G86GM 74AUP2G86GT JESD22-A114E JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 7 — 14 June 2012 Product data sheet 1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G86 74AUP2G86

    74AUP2G86DC

    Abstract: 74AUP2G86GT JESD78 P86 MARKING
    Text: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 5 — 27 July 2010 Product data sheet 1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G86 74AUP2G86 74AUP2G86DC 74AUP2G86GT JESD78 P86 MARKING

    74AUP2G86DC

    Abstract: 74AUP2G86GT JESD22-A114E JESD78
    Text: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 03 — 4 May 2009 Product data sheet 1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G86 74AUP2G86 74AUP2G86DC 74AUP2G86GT JESD22-A114E JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 7 — 14 June 2012 Product data sheet 1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G86 74AUP2G86

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 6 — 8 December 2011 Product data sheet 1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G86 74AUP2G86

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 8 — 24 January 2013 Product data sheet 1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G86 74AUP2G86