MSP430
Abstract: TPS79718 TPS79718DCKR TPS79718DCKRG4 TPS79718DCKT TPS79730 TPS79733
Text: TPS797xx www.ti.com SLVS332G – MARCH 2001 – REVISED NOVEMBER 2009 Ultra-Low IQ, 50mA LDO Linear Regulators with Power Good Output in SC70 Package FEATURES DESCRIPTION • • • • • • The TPS797xx family of low-dropout LDO voltage regulators offers the benefits of low-dropout voltage
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TPS797xx
SLVS332G
TPS797xx
MSP430
TPS79718
TPS79718DCKR
TPS79718DCKRG4
TPS79718DCKT
TPS79730
TPS79733
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TPS797xx
Abstract: No abstract text available
Text: TPS797xx www.ti.com SLVS332G – MARCH 2001 – REVISED NOVEMBER 2009 Ultra-Low IQ, 50mA LDO Linear Regulators with Power Good Output in SC70 Package FEATURES DESCRIPTION • • • • • • The TPS797xx family of low-dropout LDO voltage regulators offers the benefits of low-dropout voltage
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TPS797xx
SLVS332G
105mV
TPS79733)
TPS797xx
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Untitled
Abstract: No abstract text available
Text: TPS797xx www.ti.com SLVS332I – MARCH 2001 – REVISED OCTOBER 2013 Ultralow IQ, 50mA LDO Linear Regulators with Power Good Output in SC70 Package Check for Samples: TPS797xx FEATURES DESCRIPTION • • • • • • The TPS797xx family of low-dropout LDO voltage
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TPS797xx
SLVS332I
TPS797xx
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MTBF recom
Abstract: 217F RI-0505 RI-xx12S
Text: , Features Unregulated Converters ● ● ● ● ● ● ● ECONOLINE Custom Solutions Available 1kVDC Isolation No External Components Required Optional Continuous Short Circuit Protected UL94V-0 Package Material No Heatsink Required Efficiency to 87% DC/DC-Converter
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UL94V-0
RI-xx05S
RI-xx07S
RI-xx09S
RI-xx12S
RI-xx15S
12urrent
July-2006
RI-0505
MTBF recom
217F
RI-0505
RI-xx12S
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SSOP-90
Abstract: No abstract text available
Text: New products MBM29PDL1280F 128M-bit x16/×32 Dual-Operation Flash Memory with Page Mode MBM29PDL1280F This flash memory can simultaneously read/program/erase data with a single 3V power supply. It possesses fast access performance with an initial access time of 70ns/80ns and a page access time of 25ns/30ns under low voltage.
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MBM29PDL1280F
128M-bit
70ns/80ns
25ns/30ns
32-bit
252mW
SSOP-90FBGA-96
SSOP-90
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Untitled
Abstract: No abstract text available
Text: TPS797xx www.ti.com SLVS332G – MARCH 2001 – REVISED NOVEMBER 2009 Ultra-Low IQ, 50mA LDO Linear Regulators with Power Good Output in SC70 Package FEATURES DESCRIPTION • • • • • • The TPS797xx family of low-dropout LDO voltage regulators offers the benefits of low-dropout voltage
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TPS797xx
SLVS332G
105mV
TPS79733)
TPS797xx
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HY51V16160BJC
Abstract: No abstract text available
Text: HY51V18160B,HY51V16160B 1Mx16, Fast Page mode DESCRIPTION This family is a 16M bit dynamic RAM organized 1,048,576 x 16-bit configuration with Fast Page mode CMOS DRAMs. Fast Page mode is a kind of page mode which is useful for the read operation. The circuit and process design allow this
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HY51V18160B
HY51V16160B
1Mx16,
16-bit
1Mx16
HY51V16160BJC
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sb 050 D 331
Abstract: TPS79718 TPS79718DCKR TPS79718DCKT TPS79730 TPS79730DCKR TPS79730DCKT TPS79733
Text: TPS79718 TPS79730 TPS79733 Actual Size 2,15 mm x 2,3 mm SLVS332B – MARCH 2001 – REVISED JUNE 2001 ULTRALOW-POWER SC70/SOT-323 PACKAGED 10 mA LDO LINEAR REGULATORS WITH POWER GOOD OUTPUT element. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is very low,
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TPS79718
TPS79730
TPS79733
SLVS332B
SC70/SOT-323
TPS797xx
10-mA
sb 050 D 331
TPS79718
TPS79718DCKR
TPS79718DCKT
TPS79730
TPS79730DCKR
TPS79730DCKT
TPS79733
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Untitled
Abstract: No abstract text available
Text: PEDD51V18160F-01 1Semiconductor MSM51V18160F This version: May. 2000 Previous version : Preliminary 1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The MSM51V18160F is a 1,048,576-word × 16-bit dynamic RAM fabricated in Oki’s silicon-gate
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PEDD51V18160F-01
MSM51V18160F
576-Word
16-Bit
MSM51V18160F
42-pin
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GM71V16403C
Abstract: 16403
Text: GM71V16403C GM71VS16403CL 4,194,304 WORDS x 4 BIT CMOS DYNAMIC RAM Description Features The GM71V S 16403C/CL is the new generation dynamic RAM organized 4,194,304 words x 4 bit. GM71V(S)16403C/CL has realized higher density, higher performance and various functions by utilizing advanced CMOS
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GM71V16403C
GM71VS16403CL
GM71V
16403C/CL
16403C/CL
GM71V16403C
16403
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Untitled
Abstract: No abstract text available
Text: LMR10530 www.ti.com SNVS814A – JUNE 2012 – REVISED APRIL 2013 LMR10530 SIMPLE SWITCHER 5.5Vin, 3.0A Step-Down Voltage Regulator in WSON-10 Check for Samples: LMR10530 FEATURES DESCRIPTION • • • The LMR10530 regulator is a monolithic, high frequency, PWM step-down DC/DC converter
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LMR10530
SNVS814A
LMR10530
WSON-10
LMR10530X)
LMR10530Y)
10-pin
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Untitled
Abstract: No abstract text available
Text: TPS79718 TPS79730 TPS79733 Actual Size 2,15 mm x 2,3 mm SLVS332B – MARCH 2001 – REVISED JUNE 2001 ULTRALOW-POWER SC70/SOT-323 PACKAGED 10 mA LDO LINEAR REGULATORS WITH POWER GOOD OUTPUT element. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is very low,
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TPS79718
TPS79730
TPS79733
SLVS332B
SC70/SOT-323
10-mA
SC70/SOT-323
TPS79733)
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TPS79718
Abstract: TPS79718DCKR TPS79718DCKT TPS79730 TPS79730DCKR TPS79730DCKT TPS79733
Text: TPS79718 TPS79730 TPS79733 Actual Size 2,15 mm x 2,3 mm SLVS332B – MARCH 2001 – REVISED JUNE 2001 ULTRALOW-POWER SC70/SOT-323 PACKAGED 10 mA LDO LINEAR REGULATORS WITH POWER GOOD OUTPUT element. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is very low,
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TPS79718
TPS79730
TPS79733
SLVS332B
SC70/SOT-323
TPS797xx
10-mA
TPS79718
TPS79718DCKR
TPS79718DCKT
TPS79730
TPS79730DCKR
TPS79730DCKT
TPS79733
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P132-P134
Abstract: p331 TRANSISTOR P452
Text: MSX Family Data Sheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor
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HY51V17404C
Abstract: No abstract text available
Text: HY51V17404C,HY51V16404C 4Mx4, Extended Data Out mode DESCRIPTION This family is a 16M bit dynamic RAM organized 4,194,304 x 4-bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The circuit and process
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HY51V17404C
HY51V16404C
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a9ra
Abstract: No abstract text available
Text: J2G0126-17-61 作成：1998年 3月 ¡ 電子デバイス MSM51V16800D/DSL l 暫定 MSM51V16800D/DSL 2,097,152-Wordx8-Bit DYNAMIC RAM：高速ページモード n 概要 MSM51V16800D/DSLはCMOSプロセス技術を用いた2,097,152ワ−ド×8ビット構成のダイナミックラ
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J2G01261761
MSM51V16800D/DSL
152Word
MSM51V16800D/DSL
MSM51V16800D/DSLCMOS2
42CMOS
28SOJ28TSOP
09664ms4
096128msSL
28400milSOJ
a9ra
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Untitled
Abstract: No abstract text available
Text: TOSHIBA TC51V16400BST-60/70 PRELIMINARY 4,194,304 WORD X 4 BIT DYNAMIC RAM Description TheTC 51V16400B ST is the new generation dynamic RAM organized 4,194,304 word by 4 bits. T heTC 51V16400B ST uti lizes Toshiba's CM O S silicon gate process technology as well as advanced circuit techniques to provide wide operating mar
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TC51V16400BST-60/70
51V16400B
TC51V16400BST
300mil)
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Untitled
Abstract: No abstract text available
Text: •HYUNDAI H Y 5 1 V 1 8 1 6 4 B ,H Y 5 1 V 1 6 1 6 4 B 1Mx16, Extended Data Out mode DESCRIPTION This fam ily is a 16M bit dynam ic RAM organized 1,048,576 x 16-bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode w hich is useful for the read operation. The circuit and process
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1Mx16,
16-bit
1Mx16
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Untitled
Abstract: No abstract text available
Text: •HYUNDAI H Y 5 1 V 1 7 4 0 4 B ,H Y 5 1 V 1 6 4 0 4 B 4Mx4, Extended Data Out mode DESCRIPTION This family is a 16M bit dynamic RAM organized 4,194,304 x 4-bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The circuit and process
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Untitled
Abstract: No abstract text available
Text: HY51V16100B Series -HYUNDAI 16M x 1-bit CMOS DRAM PRELIMINARY DESCRIPTION The HY51V16100B is the new generation and fast dynamic RAM organized 16,777,216 x 4-bit. The HY51V16100B utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques
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HY51V16100B
4b750flÃ
1AD43-00-MAY95
QQ04374
HY51V16100BJ
HY51V16100BSU
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MN41X17400CTT-10
Abstract: TSOP026-P-0300B
Text: Panasonic 16M 4M-word x 4bit Dynamic RAM 2.4V ~ 3.6V 2048 Refresh / 32ms Fast Page Mode P /N : M N 4 1 X 1 7 4 0 0 C T T -1 0 The technical information described herein provides the typical characteristics and the application circuit o f a respective product, not intended to guarantee or permit a
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MN41X17400CTT-10
A0-A10
MN41X17400CTT-10
TSOP026-P-0300B
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Untitled
Abstract: No abstract text available
Text: PRE LIM IN AR Y- - May 1996 Edition 1.0 FUJITSU PRODUCT PROFILE SHEET MB8 1 V16405A-60/-70 CMOS 4M x 4 BIT HYPER PAGE MODE DYNAMIC RAM CMOS 4,194,304 x 4 BIT Hyper Page Mode Dynamic RAM The Fujitsu MB81V16405A is a fully decoded CMOS Dynamic RAM DRAM that contains
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V16405A-60/-70
MB81V16405A
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Untitled
Abstract: No abstract text available
Text: H Y 5 1 V 16 4 1 O A S e r ie s “HYUNDAI 4M X 4-bit CMOS DRAM with WPB PRELIMINARY DESCRIPTION The HY51V16410A is the new generation and fast dynamic RAM organized 4,194,304 x 4-bit. The HY51V16410A utilizes Hyundai’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide
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HY51V16410A
HY51V1641
D32-00-MAY94
4b75Dflfl
HY51V16410AJC
HY51V16410ASLJC
HY51V16410ATC
HY51V16410ASLTC
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Untitled
Abstract: No abstract text available
Text: HY51V16400B Series -HYUNDAI 4M X 4-bit CMOS DRAM PRELIMINARY DESCRIPTION The HY51V16400B is the new generation and fast dynamic RAM organized 4,194,304 x 4-bit. The HY51V16400B utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide
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HY51V16400B
HY51V16400B
1A047-00-MAY95
HY51V16400BJ
HY51V16400BSL
HY51V16400BT
HY51V16400BSLT
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