flip flop T Toggle
Abstract: flip flop T TOGGLE FLIP FLOP
Text: PSoC Creator Component Datasheet Toggle Flip Flop 1.0 Features • T input toggles Q value • Configurable width for array of Toggle Flip Flops General Description The Toggle Flip Flop captures a digital value that can be toggled. When to Use a Toggle Flip Flop
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Untitled
Abstract: No abstract text available
Text: MC14027B Dual J-K Flip-Flop The MC14027B dual J−K flip−flop has independent J, K, Clock C , Set (S) and Reset (R) inputs for each flip−flop. These devices may be used in control, register, or toggle functions. Features • • • • • • • •
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MC14027B
CD4027B
MC14027B/D
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Untitled
Abstract: No abstract text available
Text: MC14027B Dual J-K Flip-Flop The MC14027B dual J−K flip−flop has independent J, K, Clock C , Set (S) and Reset (R) inputs for each flip−flop. These devices may be used in control, register, or toggle functions. Features • • • • • • • •
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MC14027B
MC14027B
MC14027B/D
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HCC4027BF
Abstract: HCF4027BE HCC4027B HCF4027B HCF4027BC1 HCF4027BEY HCF4027BM1
Text: HCC/HCF4027B DUAL-J-K MASTER-SLAVE FLIP-FLOP . . . . . . SET-RESET CAPABILITY STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINITELY WITH CLOCK LEVEL EITHER ”HIGH” OR ”LOW” MEDIUM SPEED OPERATION - 16MHz typ. clock toggle rate at 10V STANDARDIZED SYMMETRICAL OUTPUT
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HCC/HCF4027B
16MHz
100nA
HCC4027BF
HCF4027BM1
HCF4027Bse
HCC4027BF
HCF4027BE
HCC4027B
HCF4027B
HCF4027BC1
HCF4027BEY
HCF4027BM1
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HCF4027BE
Abstract: HCF4027BM1 HCC4027B HCC4027BF HCF4027B HCF4027BC1 HCF4027BEY
Text: HCC/HCF4027B DUAL-J-K MASTER-SLAVE FLIP-FLOP . . . . . . SET-RESET CAPABILITY STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINITELY WITH CLOCK LEVEL EITHER ”HIGH” OR ”LOW” MEDIUM SPEED OPERATION - 16MHz typ. clock toggle rate at 10V STANDARDIZED SYMMETRICAL OUTPUT
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HCC/HCF4027B
16MHz
100nA
HCC4027BF
HCF4027BM1
HCF4027Bise
HCF4027BE
HCF4027BM1
HCC4027B
HCC4027BF
HCF4027B
HCF4027BC1
HCF4027BEY
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CD4027* free
Abstract: 14027B MC14027BCP MC14027BD MC14027BDR2 MC14027BF MC14027BFEL CD4027B MC14027B
Text: MC14027B Dual J-K Flip-Flop The MC14027B dual J–K flip–flop has independent J, K, Clock C , Set (S) and Reset (R) inputs for each flip–flop. These devices may be used in control, register, or toggle functions. • • • • • • Diode Protection on All Inputs
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MC14027B
MC14027B
CD4027B
r14525
MC14027B/D
CD4027* free
14027B
MC14027BCP
MC14027BD
MC14027BDR2
MC14027BF
MC14027BFEL
CD4027B
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MC14027B
Abstract: No abstract text available
Text: MC14027B Dual J-K Flip-Flop The MC14027B dual J–K flip–flop has independent J, K, Clock C , Set (S) and Reset (R) inputs for each flip–flop. These devices may be used in control, register, or toggle functions. • • • • • • Diode Protection on All Inputs
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MC14027B
CD4027B
SUFFatch\20000817\08162000
3\ONSM\08112000
MC14027BFR1
MC14027BCP
MC14027BD
MC14027BDR2
MC14027BF
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14027B
Abstract: MC14027B CD4027B MC14027BCP MC14027BD MC14027BDR2 MC14027BF MC14027BFEL
Text: MC14027B Dual J-K Flip-Flop The MC14027B dual J–K flip–flop has independent J, K, Clock C , Set (S) and Reset (R) inputs for each flip–flop. These devices may be used in control, register, or toggle functions. • • • • • • Diode Protection on All Inputs
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MC14027B
MC14027B
CD4027B
r14525
MC14027B/D
14027B
CD4027B
MC14027BCP
MC14027BD
MC14027BDR2
MC14027BF
MC14027BFEL
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HFC4013
Abstract: HCF4013BE HCF4013B HCF4013BEY HFC4013b HCC4013B HCC4013BF HCF4013BC1 HCF4013BM1
Text: HCC/HCF4013B DUAL ’D’ – TYPE FLIP–FLOP . . . . . . SET-RESET CAPABILITY STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINITELY WITH CLOCK LEVEL EITHER ”HIGH” OR ”LOW” MEDIUM-SPEED OPERATION - 16MHz typ. CLOCK TOGGLE RATE AT 10V QUIESCENT CURRENT SPECIFIED TO 20V
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HCC/HCF4013B
16MHz
100nA
HFC4013
HCF4013BE
HCF4013B
HCF4013BEY
HFC4013b
HCC4013B
HCC4013BF
HCF4013BC1
HCF4013BM1
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HEL51
Abstract: No abstract text available
Text: SY10EL51 SY100EL51 FINAL DIFFERENTIAL CLOCK D FLIP-FLOP DESCRIPTION FEATURES • ■ ■ ■ 475ps propagation delay 2.8GHz toggle frequency Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL51 are differential clock D flip-flops
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SY10EL51
SY100EL51
475ps
SY10/100EL51
HEL51
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E151
Abstract: SY100EL51 SY100EL51ZC SY10EL51 SY10EL51ZC SY10EL51ZCTR
Text: SY10EL51 SY100EL51 FINAL DIFFERENTIAL CLOCK D FLIP-FLOP DESCRIPTION FEATURES • ■ ■ ■ 475ps propagation delay 2.8GHz toggle frequency Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL51 are differential clock D flip-flops
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SY10EL51
SY100EL51
475ps
SY10/100EL51
SY10EL51ZCTR
SY100EL51ZC
SY100EL51ZCTR
E151
SY100EL51
SY100EL51ZC
SY10EL51
SY10EL51ZC
SY10EL51ZCTR
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Single Toggle Flip Flop
Abstract: AT40K AT40KAL AT94K AT94KAL Single T-Type Flip-Flop
Text: IP Core Generator: Flip-Flop Features • Flip-Flop – D-Type • Flip-Flop – Toggle • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for • • • • • • • • • FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices
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AT94K
AT40K
AT40KAL
AT94K
2434B
1/02/xM
Single Toggle Flip Flop
AT40K
AT40KAL
AT94KAL
Single T-Type Flip-Flop
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HFC4013
Abstract: HCF4013BE HCC4013B HFC4013b HCF4013BC HCC4013BF HCF4013B HCF4013BC1 HCF4013BEY HCF4013BM1
Text: HCC/HCF4013B DUAL ’D’ – TYPE FLIP–FLOP . . . . . . SET-RESET CAPABILITY STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINITELY WITH CLOCK LEVEL EITHER ”HIGH” OR ”LOW” MEDIUM-SPEED OPERATION - 16MHz typ. CLOCK TOGGLE RATE AT 10V QUIESCENT CURRENT SPECIFIED TO 20V
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HCC/HCF4013B
16MHz
100nA
HFC4013
HCF4013BE
HCC4013B
HFC4013b
HCF4013BC
HCC4013BF
HCF4013B
HCF4013BC1
HCF4013BEY
HCF4013BM1
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hcf4027be
Abstract: HCF4013B HCF4027B HCF4027BEY HCF4027BM1 HCF4027M013TR
Text: HCF4027B DUAL J-K MASTER SLAVE FLIP-FLOP • ■ ■ ■ ■ ■ ■ ■ ■ SET RESET CAPABILITY STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINETELY WITH CLOCK LEVEL EITHER "HIGH" OR "LOW" MEDIUM-SPEED OPERATION - 16MHz Typ. clock toggle rate at 10V
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HCF4027B
16MHz
100nA
JESD13B
HCF4027B
hcf4027be
HCF4013B
HCF4027BEY
HCF4027BM1
HCF4027M013TR
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7z93134
Abstract: 74HC 74HCT 7z93131
Text: 74HC/HCT109 flip-flops D U A L JK FLIP-FLOP W ITH SET A N D RESET; POSITIVE-EDGE TR IG G ER FEATURES • • TYPICAL J, K inputs fo r easy D-type flip -flo p Toggle flip -flo p or "d o nothing" mode O utput capability: standard l£ £ category: flip-flops
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74HC/HCT109
7z93134
74HC
74HCT
7z93131
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14027B
Abstract: HD14027B
Text: HD14027B Dual J - K Flip Flop The HD14027B dual J-K flip-flop has independent J, K, Clock C , Set(S) and Reset(R) inputs for each flip-flop. These devices may be used in control, register, or toggle functions. • PIN ARRANGEMENT ■ FEATURES • • •
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HD14027B
HD14027B
CD4027B
MC14027B
K20ns
14027B
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E151
Abstract: SY100EL51ZC SY10EL51 SY10EL51ZC flip-flop 555
Text: *SYNERGY PRELIMINARY SY10EL51 SY100EL51 DIFFERENTIAL CLOCK D FLIP-FLOP SEMICONDUCTOR FEATURES_ • DESCRIPTION ■ 475ps propagation delay ■ 2.8GHz toggle frequency The SY10EL/100EL51 are differential clock D flip-flops with reset. These devices are functionally sim ilar to the
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sy100el51
475ps
SY10EL/100EL51
SY10EL51ZC
SY100EL51ZC
TG013Ã
E151
SY10EL51
flip-flop 555
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Untitled
Abstract: No abstract text available
Text: ucvnciiD cino HEX D FLIP-FLOP SYNERGY SY100S351 SY1Q1S351 SEMICONDUCTOR PRELIMINARY DESCRIPTION FEATURES • 700 MHz max. Toggle Frequency. The SY100/101S351 offers six D-type, edge-triggered, master/ slave flip-flops with differential outputs, and is designed for use in
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SY100S351
SY1Q1S351
SY100/101S351
SY101S351
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Untitled
Abstract: No abstract text available
Text: MOTOROLA DUAL J-K FLIP-FLOP MC14027B The MC14Q27B dual J-K flip-flop has independent J, K, Clock {Q, Set S and Reset |R) inputs for each flip-flop. These devices may be used in control, register, or toggle functions. CMOS SSI • • Diode Protection on A ll Inputs
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MC14Q27B
MC14027B
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Untitled
Abstract: No abstract text available
Text: SY10E131 SYNERG Y 4-BIT D FLIP-FLOP OTlUltlJl SEMICONDUCTOR DESCRIPTION FEATURES • 1100 MHz min. toggle frequency. The SY10E/100E/101E131 is a high speed quad master-slave D-type flip- flop with differential outputs designed for use in new high performance ECL systems. The flip-flops may be individually
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SY10E131
SY10E/100E/101E131
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sd 101k
Abstract: No abstract text available
Text: TRIPLED FLIP-FLOP ^SYNERGY tVlO lU l] SEMICONDUCTOR ADVANCE INFORMATION FEATURES • ■ 700 MHz max. Toggle Frequency. DESCRIPTION The SY100/101S331 offers three D-type, edge-triggered mas ter/slave flip-flops with true and com plem ent outputs, designed
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SY100/101S331
sd 101k
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Untitled
Abstract: No abstract text available
Text: MC14025B See Page 6-5 MOTOROLA MCM025U8 See Page 6-14 MC14027B DUAL J-K FLIP-FLOP The M C14027B dual J-K flip-flop has independent J , K , Clock C , Set (S) and Reset (R ) inputs for each flip-flop. These devices may be used in control, register, or toggle functions.
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MC14025B
MCM025U8
MC14027B
C14027B
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Untitled
Abstract: No abstract text available
Text: * HEX D FLIP-FLOP SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. toggle frequency of 700MHz The SY100S351 offers six D-type, edge-triggered, m aster/slave flip-flops with differential outputs, and is designed for use in high-perform ance ECL system s. The
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700MHz
SY100S351
75Ki2
1200ps
SY100S351
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MC14027B
Abstract: No abstract text available
Text: W MOTOROLA D U A L J-K FLIP-FLO P MC14027B The MC14027B dual J-K flip-flop has independent J, K, Clock (Cl, Set ($) and Reset (R) inputs for each flip-flop. These devices may be used in control, register, or toggle functions. • Diode Protection on A ll Inputs
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MC14027B
CD4027B
MC14027B
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