jat52
Abstract: TA-TSY-000191 PM5319 PM5319-NI PMC-2030860
Text: us t, 20 04 09 :2 1: 24 PM ARROW 622 ASSP Telecom Standard Product Data Sheet Released es da y, 10 Au g PM5319 gi es , In c. on Tu ARROW 622 Released Issue No. 2: July 2004 Do wn lo ad ed by Sc o tt E st es of i 2T ec h no lo ASSP Telecom Standard Product Data Sheet
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PMC-2031158,
PM5319
196-pin
PM5319-NI
jat52
TA-TSY-000191
PM5319
PM5319-NI
PMC-2030860
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MIPS64
Abstract: "network interface cards"
Text: RM9120 Preliminary FEATURES AM RM9120 Integrated Microprocessor NETWORKING INTERFACES • A CPU core compatible with the MIPS64 Instruction Set Architecture. • High-speed integrated DDR SDRAM, SysAD, Local Bus, HyperTransport, and Ethernet MAC interfaces. Option
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RM9120
RM9120
MIPS64TM
672-pin
PMC-2031705
MIPS64
"network interface cards"
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RM9000
Abstract: No abstract text available
Text: CM5391L Preliminary GEN-M9K-20 Data Sheet 19 Flexible Clock Generators for MIPS 9K Based Systems AM A MEMBER OF THE PMC CLK FAMILY • 02 :2 7: PMC-Sierra’s CM5391L clock generator is the industry’s only device tailored to drive the clocking inputs of PMC-Sierra’s leading line of processors using MIPS 9K architectures, such as:
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CM5391L
GEN-M9K-20
RM9000x1,
RM9000x2
20-pin
PMC-2021479,
RM9000x1
PMC-2030357,
PMC-2011766,
RM9000x2
RM9000
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PM4329
Abstract: PMC-2021518 "TOPS" PQ-32/SBI-1
Text: 48 PM PM4329 HDLIU 32 Hardware Specification Released ch 6M ar nd ay ,2 HDLIU 32 ,2 00 6 10 :5 0: PM4329 rtm in er In co n Su Hardware Specification Released Do wn lo ad ed by Co nt e nt T ea m of Pa Issue No. 5: March 2006 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
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PM4329
PMC-2031990,
PM4329
PMC-2031990
PMC-2021518
"TOPS"
PQ-32/SBI-1
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Untitled
Abstract: No abstract text available
Text: PM8318 TEMAP 168 45 PM High Density T1/E1 Framer with Integrated VT/TU Mappers and M13 Muxes • Provides High Order Path overhead J1, B3, C2, G1 bytes processing Six serial DS3/E3/EC-1 links. ne ed • Each T1 transceiver can be independently configured to support the
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PM8318
STS-12/STM-4
STS-12/STM-4.
77MHz
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SMD codes
Abstract: 063310
Text: QuadPHY 10GX ASSP Telecom Standard Product Data Sheet Released PM8358 QuadPHY® 10GX 4 X 1.2 to 3.2 Gbit/s Quad, Fully Redundant, XAUI to XGMII, 10 Gigabit Ethernet / Fibre Channel Physical Layer Device Data Sheet Released Issue No. 5: April 2004 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
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PM8358
PMC-2020263,
17x17
SMD codes
063310
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PM8318
Abstract: G747 PM5309
Text: PM8318 TEMAP 168 W P 622M Interface Aux 6x EC1 C&D ay sd ur Th on rt pe ex n ico sil 04 9: :0 06 05 20 PMON/Alarms ar X C Do wn lo 77MHz Telecom Bus S T S 1 by s P 622M Interface Main OC-12 HO POH LO POH term ad ed W as eli m BLOCK DIAGRAM of • Processes 168 T1s/126 E1s or half of
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PM8318
77MHz
OC-12
T1s/126
STS-12/STM-4.
T1/126
PMC-2031051
PM8318
G747
PM5309
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Untitled
Abstract: No abstract text available
Text: 8: 09 AM PM5341 TEMAP 28 ASSP Telecom Standard Product Data Sheet Released ug Fr id ay ,0 8A TEMAP™ 28 us t, 20 03 07 :0 PM5341 Data Sheet Proprietary and Confidential Released Issue No. 1: May 2003 Do wn lo ad ed by Co nt en t Te am of Pa rtm in er In
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PM5341
PM5341
PMC-2030454,
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PM4329
Abstract: No abstract text available
Text: PM5337 ADM 622 Preliminary 53 2: 09 :2 LOW / HIGH ORDER CROSSCONNECT 20 04 • Integrated 2.5Gbit/s non-blocking memory based cross-connect supporting anycast traffic • Support switching at STS/AU/VT/TU level and all legal concatenations • Integrated MAPS processing for
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PM5337
28xT1
21xE1
PMC-2030421
PM4329
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Untitled
Abstract: No abstract text available
Text: PM5319 ARROW 622 Released FEATURES PM SONET/SDH Interface for 622 & 155 Mbit/s GENERAL FEATURES • Interface rate software selectable between OC-3/STM-1 155.52 Mbit/s and OC-12/STM-4 (622.08 Mbit/s) rates • Integrated clock recovery & synthesis allows direct interface to low-cost
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PM5319
OC-12/STM-4
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Untitled
Abstract: No abstract text available
Text: PM5337 ADM 622 Preliminary Integrated Add/Drop Multiplexer for 622 Mbit/s and 155 Mbit/s PM 38 9: :3 11 05 20 n Th ur sd ay • 28xT1 or 21xE1 framers with VT/TU Mapping or integrated M13 Multiplexing • 3xDS-3, E-3 or EC-1 framers and mappers per port selectable with bidirectional performance monitoring
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PM5337
28xT1
21xE1
PMC-2030421
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Untitled
Abstract: No abstract text available
Text: 6: 07 AM ARROW 12xETEC ASSP Telecom Standard Product Data Sheet Released us t, 20 04 11 :1 PM5385 Tu es da y, 03 Au g ARROW 12xETEC Data Sheet Released Issue No. 4: April 2004 Do wn lo ad ed by Sa nj iv Sh ar m ao fR SB SY ST EM S on Twelve channel E3/T3/STS-1E EC-1
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12xETEC
PM5385
12xETEC
PMC-2030120,
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RM7900
Abstract: No abstract text available
Text: Standard Products MIP 7965 64-Bit Superscaler Microprocessor October 01, 2010 www.aeroflex.com/Avionics FEATURES ❑ Upscreened PMC-Sierra RM7965 ❑ Military and Industrial Grades Available ❑ CPU core with MIPS64 compatible Instruction Set Architecture that features:
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64-Bit
RM7965
MIPS64â
16-KB,
256-KB,
64-entry
SCD7965
RM7900
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Untitled
Abstract: No abstract text available
Text: Standard Products MIP7365 64-Bit Superscaler Microprocessor January 11, 2007 FEATURES ❑ Upscreened PMC-Sierra RM7065C ❑ Military and Industrial Grades Available ❑ Dual issue symmetric superscalar microprocessor with instruction prefetch optimized for system level
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MIP7365
64-Bit
RM7065C
450MHz
32-bit
32-byte
16-Kbytes
256-Kbytes
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28-pin SSOP
Abstract: CM74 CM74CB2 CM74CB218 PMC-2031577
Text: CM74CB2 LSB 2x8 Preliminary Low-Voltage Low-Skew Dual 1-to-8 Buffer FEATURES PMC-Sierra’s CM74CB218 is a monolithic CMOS high-speed clock buffer. It contains two matched 1-to-8 fan-out buffers, designed for low outputto-output skews. The inputs can be connected together to form a single 1-to16 fan-out buffer.
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CM74CB2
CM74CB218
1-to16
28-pin
PMC-2031577
28-pin SSOP
CM74
CM74CB2
PMC-2031577
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12X3G
Abstract: PM8380 PM8383 RX AND TX jbod
Text: PM8383 SXP 12x3G Preview 12-Port SAS Edge Expander FEATURES • 48 general purpose I/O GPIO GENERAL pins for LED control and link activity monitoring • Supports serial GPIO functions • Flexible 12 port device that supports 2 hosts to 10 targets or 4 hosts to 8
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PM8383
12x3G
12-Port
PMC-2031162
12X3G
PM8380
PM8383
RX AND TX
jbod
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PM5320
Abstract: PM5319 PM4329
Text: PM5319 ARROW 622 Released SONET/SDH Interface for 622 & 155 Mbit/s FEATURES GENERAL FEATURES • Interface rate software selectable between OC-3/STM-1 155.52 Mbit/s and OC-12/STM-4 (622.08 Mbit/s) rates • Integrated clock recovery & synthesis allows direct interface to low-cost
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PM5319
OC-12/STM-4
PMC-2030426
PM5320
PM5319
PM4329
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TAIYO 8102
Abstract: tv pattern generator PM8368 PM8372 specifications tv pattern generator G30-88 GR-63-CORE PM8385 PMC-2012008 PMC-2031860
Text: QuadPHYÒ RT ASSP Standard Product Data Sheet Released PM8385 QuadPHYÒ RT 4-Port GE/FC Retimer Data Sheet Released Issue No. 1: December, 2003 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use. Document No.: PMC-2031860, Issue 1
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PM8385
PMC-2031860,
PMC-2031860
14x14
TAIYO 8102
tv pattern generator
PM8368
PM8372
specifications tv pattern generator
G30-88
GR-63-CORE
PM8385
PMC-2012008
PMC-2031860
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PM5319
Abstract: PM4329 PM5320
Text: PM5319 ARROW 622 Released SONET/SDH Interface for 622 & 155 Mbit/s FEATURES SONET/SDH INTERFACE • Interface rate software selectable between OC-3/STM-1 155.52 Mbit/s and OC-12/STM-4 (622.08 Mbit/s) rates • Integrated clock recovery & synthesis allows direct interface to low-cost
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PM5319
OC-12/STM-4
PM4329
PMC-2030426
PM5319
PM4329
PM5320
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PM4354
Abstract: PM73124 PM7328 PM7329 PM7351 IMA4
Text: PM7348 S/UNI IMA-4 Released 4 Link Inverse Multiplexer for ATM IMA / UNI PHY • Each link is software configurable as either a UNI or part of an IMA group. • Performs receive cell Header Error Check (HEC) checking and transmit cell HEC generation. • Optionally supports receive cell
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PM7348
AF-PHY-0130
16M7328
1K800
PMC-2030060
PM4354
PM73124
PM7328
PM7329
PM7351
IMA4
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ANSI X3T11
Abstract: smd 1Gs PM8354 PMC-2030175 8B10B ansi encoder MDIO clause 22 T2FU
Text: QuadPHY 1G ASSP Telecom Standard Product Data Sheet Released PM8354 QuadPHY 1G 4 CHANNEL PHYSICAL LAYER TRANSCEIVER WITH GIGABIT ETHERNET PCS AND TRUNKING FOR 933 Mbit/s TO 1.25 Gbit/s INTERFACES Data Sheet Released Issue No. 4: May 2003 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
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PM8354
PMC-2012433,
17x17
ANSI X3T11
smd 1Gs
PM8354
PMC-2030175
8B10B ansi encoder
MDIO clause 22
T2FU
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Untitled
Abstract: No abstract text available
Text: PM5337 ADM 622 Preliminary 56 1: 02 :3 LOW / HIGH ORDER CROSSCONNECT r, 20 04 • Integrated 2.5Gbit/s non-blocking memory based cross-connect supporting anycast traffic • Support switching at STS/AU/VT/TU level and all legal concatenations • Integrated MAPS processing for
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PM5337
28xT1
21xE1
PMC-2030421
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GT-6424
Abstract: No abstract text available
Text: RM7935/RM7965 Microprocessors Released RM7935/RM7965 64-bit Microprocessors with Integrated L2 Cache and EJTAG FEATURES High-performance Floating Point Unit IEEE 754 . • Fixed-point DSP instructions such as Multiply/Add, Multiply/Subtract, and 3 Operand Multiply.
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RM7935/RM7965
RM7935/RM7965
64-bit
32-bit
RM7935.
RM7965.
PMC-2030350
GT-6424
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PMC102
Abstract: 5664 c 5664 PMC101 PMC103 PMC105 PMC201 PMC203 unitrode voltage module 935 1575
Text: PMC101 -PMC105 PMC101X-PMC105X PMC201 -PMC203 PMC201X-PMC203X RECTIFIER ASSEMBLIES Single Phase Full Wave Bridges PMC Power Modules High Voltage, High Current FEATURES DESCRIPTION • • • • • The PMC POWER M O D U LE is a densely packaged sing le phase high voltage bridge
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pmc201
-PMC203
PMC20ix-PMC203x
400mA,
800mA,
200mA.
PMC102
5664
c 5664
PMC101
PMC103
PMC105
PMC203
unitrode voltage module
935 1575
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