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    Rochester Electronics LLC ISPLSI2128-100LT

    IC CPLD 128MC 10NS 176TQFP
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    Lattice Semiconductor Corporation ISPLSI-1016-60LT44

    IC CPLD 64MC 20NS 44TQFP
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    Lattice Semiconductor Corporation ISPLSI-2032VE-135LJ44

    IC CPLD 32MC 7.5NS 44PLCC
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    Lattice Semiconductor Corporation ISPLSI-2032VE-180LJ44

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    Rochester Electronics LLC ISPLSI-2032VL-110LT44

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    PLSI Datasheets (35)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    pLSI1032-60LG/883 Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-60LGN/883 Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-60LJ Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-60LJI Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-60LJNI Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-60LT Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-60LTN Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-80LJ Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-80LJN Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-80LT Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-80LTN Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-90LJ Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-90LJN Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-90LT Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032-90LTN Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032E-100LJ Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032E-125LJ Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032E-125LJN Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032E-70LJ Lattice Semiconductor High-Density Programmable Logic Original PDF
    pLSI1032E-70LJN Lattice Semiconductor High-Density Programmable Logic Original PDF

    PLSI Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    PLSI 1016-60LJ

    Abstract: PAL 007 pioneer pal16r8 programming algorithm PAL 008 pioneer lattice 1016-60LJ ISP Engineering Kit - Model 100 PLSI-2064-80LJ GAL16v8 programmer schematic GAL programming Guide ispLSI 2064-80LT
    Text: Lattice Semiconductor Data Book 1996 Click on one of the following choices: • Table of Contents • Data Book Updates & New Products • Go to Main Menu 1996 Lattice Semiconductor Corporation. All rights reserved. pLSI and pLSI Product Index Pins Density


    Original     		PDF 1016E 1032E 20ters 48-Pin 304-Pin PLSI 1016-60LJ PAL 007 pioneer pal16r8 programming algorithm PAL 008 pioneer lattice 1016-60LJ ISP Engineering Kit - Model 100 PLSI-2064-80LJ GAL16v8 programmer schematic GAL programming Guide ispLSI 2064-80LT

    isp1032

    Abstract: lattice 1032-60LJ 1032E-8
    Text: Specifications pLSI and pLSI 1032 pLSI and pLSI 1032 ® High-Density Programmable Logic Features Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — High Speed Global Interconnect — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs


    Original     		PDF Military/883 isp1032 lattice 1032-60LJ 1032E-8

    GAL 0042b

    Abstract: 1032E
    Text: ® pLSI and pLSI 1032E High-Density Programmable Logic • OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS — Complete Programmable Device Can Combine Glue Logic and Structured Designs


    Original     		PDF 1032E GAL 0042b 1032E

    1048C

    Abstract: cpga 476 1048C50LQI 1048C-70
    Text: Specifications pLSI and pLSI 1048C ® pLSI and pLSI 1048C High-Density Programmable Logic Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers


    Original     		PDF 1048C Military/883 1048C cpga 476 1048C50LQI 1048C-70

    isp1024

    Abstract: PLSI 1024-60LJ lattice 1024-60LJ isplsi device layout
    Text: Specifications pLSI and pLSI 1024 ® pLSI and pLSI 1024 High-Density Programmable Logic Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — High-Speed Global Interconnect — 4000 PLD Gates — 48 I/O Pins, Six Dedicated Inputs — 144 Registers


    Original     		PDF Military/883 isp1024 PLSI 1024-60LJ lattice 1024-60LJ isplsi device layout

    PLSI MEANS

    Abstract: ABEL-HDL Reference Manual ispLSI1016 lattice 1996
    Text: pLSI Device Kit Manual ABEL-HDL and Schematic Design Entry and Development Tool pLSI Device Kit Manual 981-0336-003A June 1996 090-0589-003A Synario Design Automation, a division of Data I/O, has made every attempt to ensure that the information in this document is accurate and complete. Synario


    Original     		PDF 81-0336-003A 90-0589-003A PLSI MEANS ABEL-HDL Reference Manual ispLSI1016 lattice 1996

    Untitled

    Abstract: No abstract text available
    Text: pLSI and pLSI 2064V ® High Density Programmable Logic Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 and 32 I/O Pin Versions, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		PDF

    44-PIN

    Abstract: 48-PIN
    Text: ® pLSI and pLSI 2032 High Density Programmable Logic Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — — — — — • HIGH PERFORMANCE E CMOS TECHNOLOGY fmax = 180 MHz Maximum Operating Frequency tpd = 5.0 ns Propagation Delay


    Original     		PDF

    2128-80LT

    Abstract: No abstract text available
    Text: ® pLSI and pLSI 2128 High-Density Programmable Logic Functional Block Diagram Output Routing Pool ORP Output Routing Pool (ORP) D7 D3 D5 fmax = 100 MHz Maximum Operating Frequency tpd = 10 ns Propagation Delay TTL Compatible Inputs and Outputs Electrically Erasable and Reprogrammable


    Original     		PDF

    PLSI 1024-60LJ

    Abstract: No abstract text available
    Text: Specifications pLSI and pLSI 1024 pLSI and pLSI 1024 ® High-Density Programmable Logic Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — High-Speed Global Interconnect — 4000 PLD Gates — 48 I/O Pins, Six Dedicated Inputs — 144 Registers — Wide Input Gating for Fast Counters, State


    Original     		PDF Military/883 PLSI 1024-60LJ

    lattice 1016-60LJ

    Abstract: Lattice 1016-80LJ PLSI 1016-60LJ 1016-80LT ispLSI1016
    Text: Specifications pLSI and pLSI 1016 pLSI and pLSI 1016 ® High-Density Programmable Logic Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — High-Speed Global Interconnect — 2000 PLD Gates — 32 I/O Pins, Four Dedicated Inputs — 96 Registers


    Original     		PDF Military/883 lattice 1016-60LJ Lattice 1016-80LJ PLSI 1016-60LJ 1016-80LT ispLSI1016

    1048C

    Abstract: No abstract text available
    Text: Specifications pLSI and pLSI 1048C pLSI and pLSI 1048C ® High-Density Programmable Logic Functional Block Diagram Output Routing Pool Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 E7 E6 E5 E4 E3 E2 E1 E0 D7 A2 A4 IG N D Q Logic Global Routing Pool GRP


    Original     		PDF 1048C Military/883 1048C

    Untitled

    Abstract: No abstract text available
    Text: Lattica pLSI and pLSI 1032 ;Semiconductor I Corporation High-Density Programmable Logic Functional Block Diagram Features HIGH-DENSITY PROGRAMMABLE LOGIC — High Speed Global Interconnect — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers


    OCR Scan     		PDF Military/883 1032-60LJI 84-Pin 1032-60LTI 100-Pin MILITARY/883 1032-60LG/883

    Untitled

    Abstract: No abstract text available
    Text: l a tt ic e sem ico nducto r 4bE D • SBAfalMI G Q D m m h BILAT p L S r 1016 ü lL a ttic e programmable Large Scale Integration T -Ÿ é /' Ÿ Û ' wu.»ir.q r j ^ ■ ä ü ä a a iü ä Feature Ÿ a • PROGRAMMABLE HIGH DENSITY LOGIC —• Member of Lattice's pLSI Family


    OCR Scan     		PDF 44-Pin 68-Pin T-fO-20

    Untitled

    Abstract: No abstract text available
    Text: Lattice pLSI and pLSI 1048E ; Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC O u tpu t R outing Pool — 8,000 PLD Gates | | O u tpu t R outing Pool ü m u lü lü llS i!


    OCR Scan     		PDF 1048E 1048E 1048E-90LQ 128-Pin 1048E-70LQ 1048E-50LQ

    Untitled

    Abstract: No abstract text available
    Text: Lattice ispLSF 1024 in-system programmable Large Scale Integration Features Functional Block Diagram • In-system programmable HIGH DENSITY LOGIC — — — — — — Member of Lattice’s pLSI Family Fully Compatible with Lattice's pLSI Family High Speed Global Interconnects


    OCR Scan     		PDF ispLS11024 68-Pin

    Untitled

    Abstract: No abstract text available
    Text: pLs/81016 I a ttirp m \ß W l li I w Droarammable Intearation programmable Larae Large Scale Integration High-Density Programmable Logic Functional Block Diagram Features • PROGRAMMABLE HIGH-DENSITY LOGIC — — — — — Member of Lattice’s pLSI Family


    OCR Scan     		PDF pLs/81016 pLS11016 1016-90LJ 1016-80LJ 1016-60LJ 1016-60LJI

    Untitled

    Abstract: No abstract text available
    Text: Lattice pLSI’ and pLSI’ 2096V ; ” Semiconductor • ■ ■ Corporation 3.3V High-Density Programmable Logic Features Functional Block Diagram* • HIGH DENSITY PROGRAMMABLE LOGIC is»« r r m i n n r a n — — — — — 4000 PLD Gates 96 I/O Pins, Six Dedicated Inputs


    OCR Scan     		PDF 128-pin DDDSM70 0212/2096V

    Untitled

    Abstract: No abstract text available
    Text: Lattice' pLSI and pLSI 1016 | Semiconductor I Corporation High-Density Programmable Logic Functional Block Diagram Features HIGH-DENSITY PROGRAMMABLE LOGIC — High-Speed Global Interconnect — 2000 PLD Gates — 32 I/O Pins, Four Dedicated Inputs — 96 Registers


    OCR Scan     		PDF Military/883 -60LJ 1016-60LT44 44-Pin 1016-60LJI 1016-60LT44I

    Untitled

    Abstract: No abstract text available
    Text: pLsr 1024 I attirp I III W programmable Large Scale Integration Features Functional Block Diagram • PROGRAMMABLE HIGH DENSITY LOGIC — — — — — Member of Lattice's pLSI Family High Speed Global Interconnects 48 I/O Pins, Six Dedicated Inputs 144 Registers


    OCR Scan     		PDF SYST21 68-Pin

    Untitled

    Abstract: No abstract text available
    Text: APP S? Î993 pLSÌ 1024 Lattice programmable Large Scale Integration High-Density Programmable Logic Functional Block Diagram Features U • PROGRAMMABLE HIGH-DENSITY LOGIC — — — — — Member of Lattice’s pLSI Family High-Speed Global Interconnects


    OCR Scan     		PDF pLS11024 1024-90LJ 68-Pin 1024-80LJ 1024-60LJ 1024-60LJI

    PLSI 1016-60LJ

    Abstract: No abstract text available
    Text: RPR 2 2 1993 pLSÌ 1016 Lattice programmable Large Scale Integration High-Density Programmable Logic Features Functional Block Diagram • PROGRAMMABLE HIGH-DENSITY LOGIC — — — — — Member of Lattice’s pLSI Family High-Speed Global Interconnects


    OCR Scan     		PDF 1016-110LJ 44-Pin 1016-90LJ 1016-80LJ 1016-60LJ PLSI 1016-60LJ

    Untitled

    Abstract: No abstract text available
    Text: p L S r 1048 programmable Large Scale Integration Features J Functional Block Diagram • PROGRAMMABLE HIGH DENSITY LOGIC — — — — — Member of Lattice's pLSI Family High Speed Global Interconnects 96 I/O Pins, Ten Dedicated Inputs 288 Registers Wide Input Gating for Fast Counters, State


    OCR Scan     		PDF PLDs83 pLS11048 120-Pin

    Untitled

    Abstract: No abstract text available
    Text: Lattica pLSI and pLSI 2096 I Semiconductor I Corporation High Density Programmable Logic Functional Block Diagram Features • HIGH DENSITY PROGRAMMABLE LOGIC m r ^ ir m ir m ir m O u tp u t R o u tin g P o ol O R P — — — — — 4000 PLD Gates


    OCR Scan     		PDF 128-Pin 128-P