PJSD05LCTM
Abstract: PJSD05
Text: PJSD05LCTM BI-DIRECTIONAL ESD PROTECTION DIODE This Penta has been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5Vdc and below.This offers an integrated solution to protect up to data line where the board space is a premium.
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Original
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PDF
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PJSD05LCTM
2011/65/EU
IEC61249
OD-923,
2013-REV
PJSD05LCTM
PJSD05
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Untitled
Abstract: No abstract text available
Text: PJSD05LCTM BI-DIRECTIONAL ESD PROTECTION DIODE This Penta has been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5Vdc and below.This offers an integrated solution to protect up to data line where the board space is a premium.
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Original
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PDF
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PJSD05LCTM
|
Untitled
Abstract: No abstract text available
Text: PJSD05LCTM BI-DIRECTIONAL ESD PROTECTION DIODE This Penta has been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5Vdc and below.This offers an integrated solution to protect up to data line where the board space is a premium.
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Original
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PDF
|
PJSD05LCTM
OD-923
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Untitled
Abstract: No abstract text available
Text: PJSD05LCTM BI-DIRECTIONAL ESD PROTECTION DIODE This Penta has been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5Vdc and below.This offers an integrated solution to protect up to data line where the board space is a premium.
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Original
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PDF
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PJSD05LCTM
OD-923
RB500V-40
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Untitled
Abstract: No abstract text available
Text: PJSD05LCTM BI-DIRECTIONAL ESD PROTECTION DIODE This Penta has been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5Vdc and below.This offers an integrated solution to protect up to data line where the board space is a premium.
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Original
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PDF
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PJSD05LCTM
2002/95/EC
OD-923
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SOD-923
Abstract: No abstract text available
Text: PJSD05LCTM BI-DIRECTIONAL ESD PROTECTION DIODE This Penta has been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5Vdc and below.This offers an integrated solution to protect up to data line where the board space is a premium.
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Original
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PDF
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PJSD05LCTM
8/20s
2002/95/EC
OD-923
SOD-923
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