PCI AHB bridge
Abstract: EP454 ahb slave to memory
Text: Eureka Technology EP454 AHB-to-PCI Host Bridge Product Summary FEATURES • Fully supports PCI specification 2.1 and 2.2 protocol. • Supports AHB bus protocol. • Downstream access transfer from AHB bus to PCI bus. • Upstream access transfer from PCI bus to AHB bus.
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EP454
PCI AHB bridge
ahb slave to memory
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AMBA BUS vhdl code
Abstract: amba ahb bus arbitration AMBA AHB memory controller AMBA AHB bus arbiter PCI AHB bridge ahb slave RTL vhdl code AMBA AHB interrupt controller in vhdl code AMBA AHB bus bus arbiter
Text: PCI specification 2.3 compliant 33/66 MHz performance 32-bit datapath PCI-HB-AHB PCI reset generator PCI bus arbiter up to 7 external bus agents 32-bit, 33/66MHz PCI AMBA AHB Host Bridge Core Interrupt controller Parity generation and parity error detection.
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32-bit
32-bit,
33/66MHz
AMBA BUS vhdl code
amba ahb bus arbitration
AMBA AHB memory controller
AMBA AHB bus arbiter
PCI AHB bridge
ahb slave RTL
vhdl code AMBA AHB
interrupt controller in vhdl code
AMBA AHB bus
bus arbiter
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PCI AHB DMA
Abstract: ahb slave RTL AMBA AHB bus AMBA AHB DMA DMA with AHB PCI AHB bridge
Text: PCI specification 2.3 compliant 66MHz PCI performance 64-bit PCI data path PCI-M64AHB Zero wait states burst mode Full PCI bus master/target func- 64-bit/66MHz PCI PCI to AMBA AHB Interface Core tionality Single PCI interrupt support
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66MHz
64-bit
PCI-M64AHB
64-bit/66MHz
PCI-M64AHB
PCI AHB DMA
ahb slave RTL
AMBA AHB bus
AMBA AHB DMA
DMA with AHB
PCI AHB bridge
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wishbone
Abstract: genesys virtex 5
Text: Compliant with PCI Express Base Specification 1.1 CPXP-EP PCI Express Endpoint Controller Core with SoC Bridge Extensions for AHB, AXI and Wishbone Implements a PCI Express endpoint controller that is compliant with PCI Express Base specification 1.1, including the Transaction, Data Link, and Physical protocol layers. It
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wishbone
genesys virtex 5
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PCI AHB DMA
Abstract: tsmc 0.18 axi bridge
Text: Compliant with PCI Express Base Specification 1.1 CPXP-EP PCI Express Endpoint Controller Core with SoC Bridge Extensions for AHB, AXI and Wishbone Implements a PCI Express endpoint controller that is compliant with PCI Express Base specification 1.1, including the Transaction, Data Link, and Physical protocol layers. It
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PCI AHB DMA
tsmc 0.18
axi bridge
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Untitled
Abstract: No abstract text available
Text: Compliant with PCI Express Base Specification 1.1 CPXP-EP PCI Express Endpoint Controller Megafunction with SoC Bridge Extensions for AHB, AXI and Wishbone Implements a PCI Express endpoint controller that is compliant with PCI Express Base specification 1.1, including the Transaction, Data Link, and Physical protocol layers. It
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AMBA APB UART
Abstract: dlc10 UT699 352-CQFP state machine for ahb to apb bridge AMBA AHB memory controller UT699 memory map UT699 cpci driver ahb fsm SDRAM edac
Text: UT699 32-bit Fault-Tolerant LEON 3FT/SPARCTM V8 Processor Aeroflex Colorado Springs 800-645-8862 www.aeroflex.com/LEON August 2009 UT699 LEON 3FT Description T Operates from 3.3V for I/O and 2.5V for core T Multifunctional memory controller supports PROM, SRAM, SDRAM, and I/O
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UT699
32-bit
-40oC
105oC)
352-pin
484-pin
IEEE754
GR-CPCI-UT699
AMBA APB UART
dlc10
352-CQFP
state machine for ahb to apb bridge
AMBA AHB memory controller
UT699 memory map
UT699 cpci driver
ahb fsm
SDRAM edac
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PCI AHB bridge
Abstract: C2800 c2800 transistor S3C2800 AD11
Text: USER'S MANUAL ERRATA This document contains the corrections of errors, typos and omissions in the following document. Samsung 32-bit CMOS S3C2800 RISC Microprocessor User's Manual Document Number: 21-S3-C2800-072002 Publication: July 2002 S3C2800 RISC MICROPROCESSOR
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32-bit
S3C2800
21-S3-C2800-072002
S3C2800
0x2800"
0x2800
PCI AHB bridge
C2800
c2800 transistor
AD11
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UT699
Abstract: leon3 UT699 DMA IEEE-1754 RAM EDAC SEU cpu aeroflex 512m pc133 SDRAM DIMM SDRAM edac IEEE754 UT699 memory map
Text: Standard Products UT699 LEON 3FT/SPARCTM V8 MicroProcessor Functional Manual August 23, 2010 www.aeroflex.com/LEON Table of Contents 1.0 INTRODUCTION 1.1 Scope 1.2 Architecture 1.3 Memory map 1.4 Interrupts 1.5 Signals 1.6 Clocking 1.6.1 Clock inputs 1.6.2 Clock gating
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UT699
32-bit
leon3
UT699 DMA
IEEE-1754
RAM EDAC SEU
cpu aeroflex
512m pc133 SDRAM DIMM
SDRAM edac
IEEE754
UT699 memory map
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ahb slave to memory
Abstract: PCI AHB DMA
Text: Eureka Technology EP140 AHB Bus Slave Product Summary FEATURES • Supports AHB bus interface to the ARM CPU. • User interface designed for high speed access to two sets of on-chip or off-chip modules. • Four write buffers to process posted write. • Dual read buffers to process CPU read.
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EP140
32-bit
32-bit.
ahb slave to memory
PCI AHB DMA
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leon3
Abstract: UT699 UT699 cpci driver SJA1000 SpaceWire Packet Generator sparc v8 UT699 memory map IEEE754 SJA1000 mac 0x80000100
Text: Standard Products UT699 LEON 3FT/SPARCTM V8 MicroProcessor Advanced Users Manual March 2, 2009 www.aeroflex.com/LEON Table of Contents 1.0 INTRODUCTION 1.1 Scope 1.2 Architecture 1.3 Memory map 1.4 Interrupts 1.5 Signals 1.6 Clocking 1.6.1 Clock inputs 1.6.2 Clock gating
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UT699
32-bit
leon3
UT699 cpci driver
SJA1000
SpaceWire Packet Generator
sparc v8
UT699 memory map
IEEE754
SJA1000 mac
0x80000100
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AMBA AHB specification
Abstract: AMBA AHB bus protocol PCI AHB bridge PCI AHB DMA inSilicon
Text: PCI Highlights 32-bit or 64-bit PCI bus path ♦ 32-bit or 64-bit application data path ♦ Zero Latency, Fast Backto-Back transfers PCI Parity Support for Memory Read Line/Multiple and Memory Write and Invalidate commands ♦ Dual Address cycles ♦ Loadable configuration
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33-MHz
66-MHz
32-bit
64-bit
64-bit
AMBA AHB specification
AMBA AHB bus protocol
PCI AHB bridge
PCI AHB DMA
inSilicon
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CQFP352
Abstract: CG484 CCGA484 Single Event Latchup ax2000 ECSS-E-ST-50-51C RTAX2000SL SpaceWire Standard Document ECSS-E-ST-50-12C RT3PE3000L SEU CCGA624 SpaceWire
Text: GAISLER Radiation-Tolerant 10x SpaceWire Router Radiation Tolerant 6x SpaceWire Router with PCI RT-SPW-ROUTER Data Sheet and User’s Manual Features • SpaceWire Router compliant with ECSS-E-ST-50-12C • Non-blocking switch-matrix connecting any input to any output
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CCGA484,
CQFP352,
CCGA624
CQFP352
CG484
CCGA484
Single Event Latchup ax2000
ECSS-E-ST-50-51C
RTAX2000SL
SpaceWire Standard Document ECSS-E-ST-50-12C
RT3PE3000L SEU
CCGA624
SpaceWire
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MRC D6 16A
Abstract: delta wireless doorbell B1565 transistor delta wireless doorbell IC 501 B1565 IXP400 b1566 IXP425 ldr t 9060 IXP422
Text: Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual September 2006 Order Number: 252480-006US INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
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IXP42X
IXC1100
252480-006US
IXC1100
MRC D6 16A
delta wireless doorbell
B1565 transistor
delta wireless doorbell IC 501
B1565
IXP400
b1566
IXP425
ldr t 9060
IXP422
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Untitled
Abstract: No abstract text available
Text: Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual June 2004 Document Number: 252480-004 Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Contents INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. EXCEPT AS PROVIDED IN INTEL'S TERMS
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IXP42X
IXC1100
IXC1100
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Untitled
Abstract: No abstract text available
Text: QL903M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 200 MHz (260 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz
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QL903M
32-bit
PC-100
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mips r4000
Abstract: No abstract text available
Text: QL902M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 200 MHz (260 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz
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QL902M
32-bit
16-bit
mips r4000
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Untitled
Abstract: No abstract text available
Text: QL902M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 200 MHz (260 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz
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QL902M
32-bit
16-bit
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quicklogic an20
Abstract: 901M AA13 LVCMOS25 MIPS32 PC-100 QL901M R4000 Building An AMBA AHB Compliant Memory Controller
Text: QL901M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 133 MHz (173 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz
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QL901M
32-bit
PC-100
quicklogic an20
901M
AA13
LVCMOS25
MIPS32
R4000
Building An AMBA AHB Compliant Memory Controller
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32x32 Multiplier
Abstract: No abstract text available
Text: QL903M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 200 MHz (260 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz
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QL903M
32-bit
16-bit
32x32 Multiplier
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LVCMOS25
Abstract: MIPS32 PC-100 QL903M R4000 1024x32
Text: QL903M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 200 MHz (260 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz
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QL903M
32-bit
PC-100
LVCMOS25
MIPS32
R4000
1024x32
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LVCMOS25
Abstract: MIPS32 PC-100 QL902M QL902M175 QL902M200 R4000 APB 630
Text: QL902M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 233 MHz (303 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz
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QL902M
32-bit
PC-100
LVCMOS25
MIPS32
QL902M175
QL902M200
R4000
APB 630
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Untitled
Abstract: No abstract text available
Text: QL901M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 133 MHz (173 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz
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QL901M
32-bit
16-bit
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LVCMOS25
Abstract: MIPS32 PC-100 QL903M R4000
Text: QL903M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 233 MHz (303 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz
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QL903M
32-bit
PC-100
LVCMOS25
MIPS32
R4000
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