Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    PB11B Search Results

    SF Impression Pixel

    PB11B Price and Stock

    Infineon Technologies AG FF11MR12W1M1PB11BPSA1

    MOSFET 2N-CH 1200V AG-EASY1B
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey FF11MR12W1M1PB11BPSA1 Tray 53 1
    • 1 $163.01
    • 10 $147.462
    • 100 $147.462
    • 1000 $147.462
    • 10000 $147.462
    Buy Now

    Infineon Technologies AG F3L8MR12W2M1HPB11BPSA1

    MOSFET 2N-CH 1200V 85A AG-EASY2B
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey F3L8MR12W2M1HPB11BPSA1 Tray 32 1
    • 1 $140.45
    • 10 $140.45
    • 100 $123.75222
    • 1000 $123.75222
    • 10000 $123.75222
    Buy Now
    Mouser Electronics F3L8MR12W2M1HPB11BPSA1 33
    • 1 $129.9
    • 10 $129.9
    • 100 $123.75
    • 1000 $123.75
    • 10000 $123.75
    Buy Now
    Newark F3L8MR12W2M1HPB11BPSA1 Bulk 54 1
    • 1 $162.13
    • 10 $151.54
    • 100 $146.23
    • 1000 $146.23
    • 10000 $146.23
    Buy Now
    EBV Elektronik F3L8MR12W2M1HPB11BPSA1 90 15 Weeks 18
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 -
    Buy Now
    New Advantage Corporation F3L8MR12W2M1HPB11BPSA1 72 1
    • 1 -
    • 10 -
    • 100 $179.94
    • 1000 $179.94
    • 10000 $179.94
    Buy Now

    Infineon Technologies AG FS33MR12W1M1HPB11BPSA1

    LOW POWER EASY
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey FS33MR12W1M1HPB11BPSA1 Tray 30 1
    • 1 $103.87
    • 10 $86.5
    • 100 $86.5
    • 1000 $86.5
    • 10000 $86.5
    Buy Now
    Avnet Americas FS33MR12W1M1HPB11BPSA1 Tray 14 Weeks 30
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 -
    Get Quote
    EBV Elektronik FS33MR12W1M1HPB11BPSA1 15 Weeks 30
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 -
    Buy Now

    Infineon Technologies AG FP10R12W1T4PB11BPSA1

    IGBT MOD 1200V 20A 20MW
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey FP10R12W1T4PB11BPSA1 Tray 29 1
    • 1 $47.11
    • 10 $35.495
    • 100 $47.11
    • 1000 $47.11
    • 10000 $47.11
    Buy Now
    Rochester Electronics FP10R12W1T4PB11BPSA1 1,170 1
    • 1 $36.82
    • 10 $36.82
    • 100 $34.61
    • 1000 $31.3
    • 10000 $31.3
    Buy Now

    Infineon Technologies AG DF80R07W1H5FPB11BPSA1

    LOW POWER EASY
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey DF80R07W1H5FPB11BPSA1 Tray 29 1
    • 1 $61.43
    • 10 $47.009
    • 100 $61.43
    • 1000 $61.43
    • 10000 $61.43
    Buy Now
    EBV Elektronik DF80R07W1H5FPB11BPSA1 60 15 Weeks 30
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 -
    Buy Now
    New Advantage Corporation DF80R07W1H5FPB11BPSA1 60 1
    • 1 -
    • 10 -
    • 100 $66.73
    • 1000 $66.73
    • 10000 $66.73
    Buy Now

    PB11B Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    00XXX001

    Abstract: BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12
    Text: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Baseline FPGA family used in Series 3+ FPSCs field programmable system chips which combine FPGA logic


    Original
    PDF OR3T20 OR3T30 1A-06. OR3T80 00XXX001 BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12

    MachXO sysIO Usage Guide

    Abstract: LCMXO256C-4M100C LCMXO2280 lcmxo640c-3tn100i LCMXO640C-3FT256C LCMXO1200 LCMXO256 LCMXO2280E-4M132I LVCMOS15 LVCMOS25
    Text: MachXO Family Data Sheet Version 02.3_4W February 2007 MachXO Family Data Sheet Introduction April 2006 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


    Original
    PDF TN1086) TN1087) TN1097) MachXO sysIO Usage Guide LCMXO256C-4M100C LCMXO2280 lcmxo640c-3tn100i LCMXO640C-3FT256C LCMXO1200 LCMXO256 LCMXO2280E-4M132I LVCMOS15 LVCMOS25

    OR3LP26B

    Abstract: OR3T20 ORT8850 7ba2 diode pb7d
    Text: Preliminary Data Sheet April 2001 PayloadPlus /APC UTOPIA Slave Bridge Introduction Features The PayloadPlus/ATM port controller APC universal test and operations PHY interface for ATM (UTOPIA) slave bridge, also known as the PayloadPlus APC wedge (PAW) or the Atlanta™ interface


    Original
    PDF OR3T20 DS01-212NCIP OR3LP26B ORT8850 7ba2 diode pb7d

    TPE11

    Abstract: TPT20 CON6A v2 tpr4 pr48b PT13B condor E5 Condor LVCMOS15 LVCMOS25
    Text: LatticeEC Standard Evaluation Board – Revision B User’s Guide April 2007 ebug10_01.4 Lattice Semiconductor LatticeEC Standard Evaluation Board – Revision B User’s Guide Introduction The LatticeEC Standard Evaluation Board provides a convenient platform to evaluate, test and debug user


    Original
    PDF ebug10 120-pin) 32-bit PVG5H503A01 TPE11 TPT20 CON6A v2 tpr4 pr48b PT13B condor E5 Condor LVCMOS15 LVCMOS25

    OSC4/SM

    Abstract: MDLS-20265 OPTREX C-51505 MDLS-24265 short stop 12v p18 30a rs232 converter dmx Mosfet J49 LCM-S01602 lcm-s02402 Vishay SOT23 MARKING F5
    Text: LatticeXP2 Advanced Evaluation Board User’s Guide January 2009 Revision: EB30_01.3 LatticeXP2 Advanced Evaluation Board User’s Guide Lattice Semiconductor Introduction The LatticeXP2 Advanced Evaluation Board provides a convenient platform to evaluate, test and debug user


    Original
    PDF LatticeXP2-17 24-6R8 OSC4/SM MDLS-20265 OPTREX C-51505 MDLS-24265 short stop 12v p18 30a rs232 converter dmx Mosfet J49 LCM-S01602 lcm-s02402 Vishay SOT23 MARKING F5

    CON6A

    Abstract: K4T51163QG-HCE60 pDS4102-DL2 LVCMOS33 LVCMOS15 LVCMOS25 PB50B TPE11 PL43A FPGA48
    Text: LatticeEC Standard Evaluation Board – Revision A User’s Guide April 2007 EB07_02.4 Lattice Semiconductor LatticeEC Standard Evaluation Board – Revision A User’s Guide Introduction The LatticeEC Standard Evaluation Board provides a convenient platform to evaluate, test and debug user


    Original
    PDF 120-pin) 32-bit PVG5H503A01 CON6A K4T51163QG-HCE60 pDS4102-DL2 LVCMOS33 LVCMOS15 LVCMOS25 PB50B TPE11 PL43A FPGA48

    LC4064ZE

    Abstract: BSDL Files infineon LFXP6C-3FN256I "x-ray machine" K4H560838E LC4064 LC4256ZE LFXP10C-3F256I LFxP3C-3TN144C PCI x1 express PCB dimensions artwork
    Text: LatticeXP Family Handbook HB1001 Version 03.4, September 2010 LatticeXP Family Handbook Table of Contents September 2010 Section I. LatticeXP Family Data Sheet Introduction Features . 1-1


    Original
    PDF HB1001 TN1050 TN1049 TN1082 TN1074 LC4064ZE BSDL Files infineon LFXP6C-3FN256I "x-ray machine" K4H560838E LC4064 LC4256ZE LFXP10C-3F256I LFxP3C-3TN144C PCI x1 express PCB dimensions artwork

    30021

    Abstract: L48C L41C IC L44C DATASHEET L30C l31c L43C ORSO42G5 ORSO82G5 ORT42G5
    Text: ORCA ORSO42G5 and ORSO82G5 0.6 - 2.7 Gbps SONET Backplane Interface FPSCs August 2005 Data Sheet Introduction Lattice has extended its family of high-speed serial backplane devices with the ORSO42G5 and ORSO82G5 devices. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSO42G5 and


    Original
    PDF ORSO42G5 ORSO82G5 ORSO82G5 ORSO42G5-1BMN484I ORSO82G5-2FN680I 30021 L48C L41C IC L44C DATASHEET L30C l31c L43C ORT42G5

    h22 8-pin

    Abstract: J68 10A PL-20A DC3BE J119 J1266 1J44 PL34A JITo-2-dc3 J127
    Text: ORLI10G ver. 1.5 1 01/29/03 Lattice Semiconductor Corp SECTION PAGE LAYOUT OF ORLI10G BOARD: 3 CONNECTORS AND JUMPERS J1 TO J127: 4 CONNECTORS CON1 TO CON5: 18 ADJUSTABLE RESISTORS: 22 ORLI10G ver. 1.5 2 01/29/03 Lattice Semiconductor Corp Layout of ORLI10G board:


    Original
    PDF ORLI10G ORLI10G: h22 8-pin J68 10A PL-20A DC3BE J119 J1266 1J44 PL34A JITo-2-dc3 J127

    syscon

    Abstract: LFEC1E-3T100C ips works 6CW3
    Text: LatticeECP/EC Family Data Sheet Version 01.3 LatticeECP/EC Family Data Sheet Introduction November 2004 Preliminary Data Sheet Features − − − − − − • Extensive Density and Package Options • 1.5K to 41K LUT4s • 65 to 576 I/Os • Density migration supported


    Original
    PDF 36x36 18x18 DDR400 200MHz) TN1052) TN1057) TN1053) syscon LFEC1E-3T100C ips works 6CW3

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet Version 04.4, April 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


    Original
    PDF HSTL15 TN1050) TN1052) TN1082)

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet Version 03.0, September 2005 LatticeXP Family Data Sheet Introduction July 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original
    PDF HSTL15 TN1050) TN1052) TN1082)

    Untitled

    Abstract: No abstract text available
    Text: ORCA ORLI10G Quad 2.5Gbps, 10Gbps Quad 3.125Gbps, 12.5Gbps Line Interface FPSC August 2004 Data Sheet Introduction The Lattice ORCA Series 4-based ORLI10G FPSC combines a high-speed line interface with a flexible FPGA logic core. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORLI10G consists


    Original
    PDF ORLI10G 10Gbps 125Gbps, ORLI10G OIF-SFI4-01 16-bit ORLI10G-2BMN680I

    pt45

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet DS1004 Version 01.2, June 2006 LatticeSC Family Data Sheet Introduction June 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original
    PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 110mW VCC12. LFSC25 900-Ball pt45

    IC TTL 7495 diagram and truth table

    Abstract: BA 5979 S AM 5766 BA 5979 motorola s240 pin diagram of ic 7495 Xilinx counter transistor on 4409 PR25D inverter design using plc
    Text: Data Sheet June 1999 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 µm OR3C and 0.3 µm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


    Original
    PDF DS99-087FPGA DS98-163FPGA-01) IC TTL 7495 diagram and truth table BA 5979 S AM 5766 BA 5979 motorola s240 pin diagram of ic 7495 Xilinx counter transistor on 4409 PR25D inverter design using plc

    PT35c transistor

    Abstract: pt35c transistor pt36c me 4946 PBGA PR25D transistor on 4409 307-45 4946 ah lm 458 ic
    Text: Data Addendum March 2002 ORCA OR3LxxxB Series Field-Programmable Gate Arrays Introduction This data addendum refers to the information found in the ORCA® Series 3C and 3T Field-Programmable Gate Arrays Data Sheet. • ■ Features ■ ■ ■ ■ ■ ■


    Original
    PDF 16-bit OR3L165B OR3L225B OR3L165B7PS208I-DB OR3L165B7PS240I-DB OR3L165B7BA352I-DB OR3L165B7BC432I-DB OR3L165B7BM680I-DB OR3L225B7BC432I-DB OR3L225B7BM680I-DB PT35c transistor pt35c transistor pt36c me 4946 PBGA PR25D transistor on 4409 307-45 4946 ah lm 458 ic

    transistor pt36c

    Abstract: datasheet transistor pt36C PT35c transistor pt36c microprocessor block diagram of plc pt35c transistor pt42c PT42C transistor BC 157 PLC Communication cables pin diagram
    Text: Data Sheet November, 2003 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL 3.3V and LVCMOS (2.5 V and 1.8 V) I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


    Original
    PDF sink/12 transistor pt36c datasheet transistor pt36C PT35c transistor pt36c microprocessor block diagram of plc pt35c transistor pt42c PT42C transistor BC 157 PLC Communication cables pin diagram

    LCM-S02002DSR

    Abstract: No abstract text available
    Text:  LatticeECP3 Video Protocol Board – Revision C User’s Guide October 2012 Revision: EB52_01.3  LatticeECP3 Video Protocol Board – Revision C User’s Guide Introduction The LatticeECP3™ FPGA family includes many features for video applications. For example, DisplayPort, SMPTE


    Original
    PDF BLM21AG601SN1D LCM-S02002DSR

    BA 5979 S

    Abstract: or3t806ba352-db 2764 EEPROM BA 5979 BL06 transistor OR3T125 OR3T20 OR3T30 OR3T55 PT10
    Text: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, 0.35 m OR3C and 0.3 μm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in


    Original
    PDF OR3C804PS208I-DB OR3C804BA352I-DB OR3T206S208I-DB OR3T306S208I-DB OR3T306S240I-DB OR3T306BA256I-DB OR3T556PS208I-DB1 OR3T556S208I-DB OR3T556PS240I-DB OR3T556BA256I-DB BA 5979 S or3t806ba352-db 2764 EEPROM BA 5979 BL06 transistor OR3T125 OR3T20 OR3T30 OR3T55 PT10

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original
    PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Handbook HB1002 Version 02.0, November 2007 MachXO Family Handbook Table of Contents November 2007 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original
    PDF HB1002 TN1086 TN1090 TN1091 TN1092

    Lattice Semiconductor Package Diagrams 256-Ball fpBGA

    Abstract: 16-bit adder
    Text: LatticeECP2/M Family Data Sheet DS1007 Version 02.1, September 2006 LatticeECP2/M Family Data Sheet Introduction September 2006 Advance Data Sheet DS1007 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic


    Original
    PDF DS1007 DS1007 200MHz) ECP2-12. Lattice Semiconductor Package Diagrams 256-Ball fpBGA 16-bit adder

    BGA 927

    Abstract: No abstract text available
    Text: MachXO Family Handbook HB1002 Version 01.9, February 2007 MachXO Family Handbook Table of Contents February 2007 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original
    PDF HB1002 TN1089 TN1092 BGA 927

    Untitled

    Abstract: No abstract text available
    Text: AT&T Data Sheet October 1995 Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 |im technology (four-input look-up table delay less than 3.6 ns)


    OCR Scan
    PDF ATT2C04, ATT2C06, ATT2C08, ATT2C10, ATT2C12, ATT2C15, ATT2C26, ATT2C40. DS95-183FPGA DS95-031