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    PARALLEL TO SERIAL CONVERTER-ARM CORE Search Results

    PARALLEL TO SERIAL CONVERTER-ARM CORE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TMPM3HMFYAFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP80-1212-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HPFYADFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP128-1420-0.50-001 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HLFYAUG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP64-1010-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HNFZAFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP100-1414-0.50-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HLFZAUG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP64-1010-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation

    PARALLEL TO SERIAL CONVERTER-ARM CORE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    ARM920T rom

    Abstract: ARM920T ARM946E-S universal reciever books avr atmel dac adc ip cores atmel DSP
    Text: S YSTEM L EVEL I NTEGRATION ATMEL MCU Bus Microcontroller Core Memory Controller SYSTEM BUILDING BLOCKS Program/ Data Memories RAM ROM Flash EEPROM MCU Peripherals External Memory Bus DMA Controller DSP Sybsystem DPRAM Buffer Standard Interfaces DSP Pgm DSP


    Original     		PDF ARM920T® ARM946E-S® ARM920T rom ARM920T ARM946E-S universal reciever books avr atmel dac adc ip cores atmel DSP

    ML674000

    Abstract: No abstract text available
    Text: PEDL674000-01 1Semiconductor ML674000 This version: Oct. 2001 Preliminary µPLAT-7B Based Microcontroller GENERAL DESCRIPTION This LSI incorporates µPLAT]-7B, employing the CPU core ARM7TDMI¥, as the CPU platform and operates at maximum 33 MHz. It contains built-in RAM and peripheral IOs such as Timer, WDT, GPIO, PWM, UART


    Original     		PDF PEDL674000-01 ML674000 32-bit 16-bit ML674000

    UG585

    Abstract: CLG225 ZYNQ-7000 zynq7000
    Text: Zynq-7000 All Programmable SoC Overview DS190 v1.5 September 3, 2013 Preliminary Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core


    Original     		PDF Zynq-7000 DS190 UG585 CLG225 zynq7000

    Untitled

    Abstract: No abstract text available
    Text: Zynq-7000 All Programmable SoC Overview DS190 v1.6 December 2, 2013 Preliminary Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core


    Original     		PDF Zynq-7000 DS190

    Untitled

    Abstract: No abstract text available
    Text: TM September 2013 • Vybrid Controller F Series Summary − Target applications − Differentiating − Product − Use details cases − Enablement • features and partner solutions 2D-ACE Graphics Deep Dive if time permits TM 2 Kinetis Microcontrollers


    Original     		PDF 153km MPC5606S 24-bit

    ZYNQ-7000

    Abstract: xc7z020 zynq axi ethernet software example AMBA AXI dma controller designer user guide axi interface ddr3 memory controller ARm cortexA9 GPIO Z-7045 FFG676 xc7z030 LPDDR2 1Gb Memory xilinx DDR3 controller user interface
    Text: Zynq-7000 All Programmable SoC Overview DS190 v1.2 August 21, 2012 Advance Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core


    Original     		PDF Zynq-7000 DS190 ZynqTM-7000 xc7z020 zynq axi ethernet software example AMBA AXI dma controller designer user guide axi interface ddr3 memory controller ARm cortexA9 GPIO Z-7045 FFG676 xc7z030 LPDDR2 1Gb Memory xilinx DDR3 controller user interface

    zynq axi ethernet software example

    Abstract: XC7Z020 AMBA AXI dma controller designer user guide ZYNQ-7000 Xilinx Z-7020 DDR3L lpddr2 axi compliant ddr3 controller XC7Z100 XC7Z010 xc7z030
    Text: Zynq-7000 All Programmable SoC Overview DS190 v1.3 March 15, 2013 Preliminary Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core


    Original     		PDF Zynq-7000 DS190 ZynqTM-7000 zynq axi ethernet software example XC7Z020 AMBA AXI dma controller designer user guide Xilinx Z-7020 DDR3L lpddr2 axi compliant ddr3 controller XC7Z100 XC7Z010 xc7z030

    Z-7020

    Abstract: No abstract text available
    Text: Zynq-7000 All Programmable SoC Overview DS190 v1.4 August 6, 2013 Preliminary Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core


    Original     		PDF Zynq-7000 DS190 Z-7020

    CP017

    Abstract: PV18x DA021 tetrapol OP026 AT76 schmitt trigger non inverting LD003
    Text: Library Cell Index March 2000 Code Description OakDSPCore 16-bit fixed point DSP core ARM7TDMI™ ARM7 Thumb 32-bit RISC microcontroller core AVR® 8-bit RISC microcontroller core AT8032 8-bit microcontroller core Lode 16-bit fixed point DSP core Code


    Original     		PDF AT8032 16-bit 32-bit 0816C 03/00/15M CP017 PV18x DA021 tetrapol OP026 AT76 schmitt trigger non inverting LD003

    linky

    Abstract: No abstract text available
    Text: NCN49597 Product Preview Power Line Carrier Modem ON Semiconductor’s NCN49597 is an IEC 61334−5−1 compliant power line carrier modem using spread−FSK S−FSK modulation for robust low data rate communication over power lines. NCN49597 is built around an ARM processor core, and includes the MAC layer.


    Original     		PDF NCN49597 NCN49597 NCN49597/D linky

    linky

    Abstract: No abstract text available
    Text: NCN49597 Product Preview Power Line Carrier Modem ON Semiconductor’s NCN49597 is an IEC 61334−5−1 compliant power line carrier modem using spread−FSK S−FSK modulation for robust low data rate communication over power lines. NCN49597 is built around an ARM processor core, and includes the MAC layer.


    Original     		PDF NCN49597 NCN49597 NCN49597/D linky

    AD1032

    Abstract: BG016 Nand gate Crystal Oscillator 1.8v cmos inverter AD029 SM020 PV18x DA040 OSC37 AD019
    Text: LIBRARY CELL INDEX January 2001 ARM Cores and Peripherals Code Description ARM7TDMI® ARM7 Thumb® 32-bit RISC microcontroller core C740 8 KB cache memory ARM920T ARM920T core ARM946ES ARM9 Thumb 32-bit RISC microcontroller core with flexible cache and protection unit


    Original     		PDF 32-bit ARM920T ARM920T ARM946ES 0816D AD1032 BG016 Nand gate Crystal Oscillator 1.8v cmos inverter AD029 SM020 PV18x DA040 OSC37 AD019

    Untitled

    Abstract: No abstract text available
    Text: Holtek 32-bit Microcontroller with ARM Cortex -M3 Core HT32F1251/51B/52/53 Series Datasheet Revision: V1.20 Date: ������������� June 04, 2014 32-bit ARM Cortex™-M3 MCU HT32F1251/51B/52/53 Table of Contents 1 General Description. 6


    Original     		PDF 32-bit HT32F1251/51B/52/53 HT32F1251/51B/52/53

    Untitled

    Abstract: No abstract text available
    Text: Holtek 32-bit Microcontroller with ARM Cortex -M3 Core HT32F1251/51B/52/53 Series Datasheet Revision: V1.10 Date: April 13, 2012 32-bit ARM Cortex™-M3 MCU HT32F1251/51B/52/53 Table of Contents 1 General Description. 6


    Original     		PDF 32-bit HT32F1251/51B/52/53 HT32F1251/51B/52/53

    Atmel resistive touchscreen

    Abstract: No abstract text available
    Text: Features • Core • • • • • • – ARM926EJ-S ARM Thumb® Processor running up to 400 MHz @ 1.0V +/- 10% – 16 Kbytes Data Cache, 16 Kbytes Instruction Cache, Memory Management Unit Memories – One 128-Kbyte internal ROM embedding bootstrap routine


    Original     		PDF ARM926EJ-STM 128-Kbyte 32-Kbyte 32-bit 24-bit 11096AS 4-Oct-11 Atmel resistive touchscreen

    AD1032

    Abstract: ad029 su g75 BG016 ASF08 AD030 ARM926EJ-S ARM946E-S C740 ARM926EJ-STM
    Text: LIBRARY CELL INDEX August 2003 ARM Cores and Peripherals Code Description ARM7TDMI® ARM7 Thumb® 32-bit RISC microcontroller core C740 8 KB cache memory ARM926EJ-S™ ARM9™ Thumb 32-bit RISC microcontroller core with flexible cache, tightly coupled memory interfaces and memory management unit


    Original     		PDF 32-bit ARM926EJ-STM ARM946E-STM ARM926EJ-STM, ARM946E-STM 0816E AD1032 ad029 su g75 BG016 ASF08 AD030 ARM926EJ-S ARM946E-S C740 ARM926EJ-STM

    Untitled

    Abstract: No abstract text available
    Text: Holtek 32-bit Microcontroller with ARM Cortex -M3 Core HT32F1251/51B/52/53 Series Datasheet Revision: V1.10 Date: �������������� April 13, 2012 32-bit ARM Cortex™-M3 MCU HT32F1251/51B/52/53 Table of Contents 1 General Description. 6


    Original     		PDF 32-bit HT32F1251/51B/52/53 HT32F1251/51B/52/53

    ARM TQFP128

    Abstract: TQFP128-P-1414-0 Examples UART Program ARM ARM dual port SRAM compiler ML674000 PEDL674000-01
    Text: DATA SHEET O K I T E L E C O M P R O D U C T S ML674000 General-Purpose µPLAT -Based Microcontroller March 2002 PLAT-7C ARM7TDMI“ -Based Integration Platform Oki Semiconductor PEDL674000-01 OKI Semiconductor ML674000 General-Purpose µPLAT™-7B Based Microcontroller


    Original     		PDF ML674000 PEDL674000-01 ML674000 16550-compatible) ARM TQFP128 TQFP128-P-1414-0 Examples UART Program ARM ARM dual port SRAM compiler PEDL674000-01

    ARM TQFP128

    Abstract: ML674000 PEDL674000-01 TQFP128-P-1414-0
    Text: DATA SHEET O K I M I C R Preliminary O C O N T R O L L E R P R O D U C T S ML674000 General-Purpose µPLAT -based Microcontroller March 2002 PLAT-7C ARM7TDMI“ -Based Integration Platform Document Reference: PEDL674000-01 Oki Semiconductor PEDL674000-01


    Original     		PDF ML674000 PEDL674000-01 ML674000 16550-compatible) ARM TQFP128 PEDL674000-01 TQFP128-P-1414-0

    LQFP48

    Abstract: PA15 etm lsi logic ht32f1251 Holtek Semiconductor isp SPI timing diagram 0x40080000
    Text: Holtek 32-bit Microcontroller with ARM Cortex -M3 Core HT32F1251/51B/52/53 Series Datasheet Revision: V1.00 Date: May 27, 2011 32-bit ARM Cortex™-M3 MCU HT32F1251/51B/52/53 Table of Contents 1 General Description. 6


    Original     		PDF 32-bit HT32F1251/51B/52/53 HT32F1251/51B/52/53 LQFP48 PA15 etm lsi logic ht32f1251 Holtek Semiconductor isp SPI timing diagram 0x40080000

    966ES

    Abstract: GPS interface WITH ARM
    Text: CW25 Development Kit P R O D U C T B R I E Description The CW25 Development Kit is a complete development platform for the CW25 GPS receiver. The development kit includes a CW25 GPS receiver, peripherals and power supply all housed in an enclosure. The development kit


    Original     		PDF RS232 966E-S 966ES GPS interface WITH ARM

    ARM7TDI

    Abstract: 74hc140 AM27C010-120DC ARM7DMI arm7tdi on chip counters 74HC14
    Text: Application Note 31 Using EmbeddedICE Document number: ARM DAI 0031C Issued: February 1999 Copyright ARM Limited 1999 Application Note 31 Using EmbeddedICE Copyright 1999 ARM Limited. All rights reserved. Release information The following changes have been made to this Application Note.


    Original     		PDF 0031C 100KHz ARM7TDI 74hc140 AM27C010-120DC ARM7DMI arm7tdi on chip counters 74HC14

    8251 DMA controller

    Abstract: 8255 usart serial port 8251 PIO 8255
    Text: SINGLE-CHIPSYSTEMS CPU CORES I« T C A Cif" • ir* rmK B 'iwà Si h| !l|I Im i Cell-based IC s ★ Under development The building block method featuring high performance macrocells and a variety of CPU cores allows Sharp to deliver high density, high performance and high value-added ASICs which meet the wide ranging demands of its customers.


    OCR Scan     		PDF 16-bit 32-bit 256-byte 8251 DMA controller 8255 usart serial port 8251 PIO 8255

    82c51

    Abstract: No abstract text available
    Text: SINGLE-CHIP SYSTEMS CPU CORES Cell-baaed ICs kSFASIC ★ U nderdevelopm ent The building block method featuring high performance macrocells and a variety of CPU cores allows Sharp to deliver high density, high performance and high value-added ASICs which meet the wide ranging demands of its customers.


    OCR Scan     		PDF V20HL V30HL 48mA/channel 82C59) 82C88) 82C50) 82C51) 82C37) 82c51