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    OF 74HC107 IC Search Results

    OF 74HC107 IC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation

    OF 74HC107 IC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74HC107; 74HCT107 Dual JK flip-flop with reset; negative-edge trigger Rev. 3 — 18 November 2013 Product data sheet 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock CP and reset (R) inputs and complementary Q and Q


    Original     		PDF 74HC107; 74HCT107 74HCT107 HCT107

    HC-107

    Abstract: HC107
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54/74HC107, CD54/74HCT107 Data sheet acquired from Harris Semiconductor SCHS139A Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised May 2000 Features


    Original     		PDF HC107 HCT10 CD54/74HC107, CD54/74HCT107 SCHS139A HC107 HCT107 HC-107

    CD74HCT107

    Abstract: CD54HC107F3A CD54HCT107F3A CD74HC107E HC107 HCT10
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54/74HC107, CD54/74HCT107 Data sheet acquired from Harris Semiconductor SCHS139B Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised December 2002


    Original     		PDF HC107 HCT10 CD54/74HC107, CD54/74HCT107 SCHS139B HC107 HCT107 CD74HCT107 CD54HC107F3A CD54HCT107F3A CD74HC107E HCT10

    125oCMIN

    Abstract: No abstract text available
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54/74HC107, CD54/74HCT107 Data sheet acquired from Harris Semiconductor SCHS139B Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised December 2002


    Original     		PDF CD54/74HC107, CD54/74HCT107 SCHS139B HC107 HCT107 HC/HCT73 125oCMIN

    HC-107

    Abstract: hc107
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54/74HC107, CD54/74HCT107 Data sheet acquired from Harris Semiconductor SCHS139B Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised December 2002


    Original     		PDF CD54/74HC107, CD54/74HCT107 SCHS139B HC107 HCT107 HC/HCT73 59628515401CA CD54HC107F3A 5962View 8515401CA HC-107

    74LS107

    Abstract: M54HC107 M54HC107F1R M74HC107 M74HC107B1R M74HC107C1R M74HC107M1R jk flip flop cmos
    Text: M54HC107 M74HC107 DUAL J-K FLIP FLOP WITH CLEAR . . . . . . . . HIGH SPEED fMAX = 75 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC107 M74HC107 54/74LS107 M54HC107F1R M74HC107M1R M74HC107B1R M74HC107C1R M54/74HC107 74LS107 M54HC107 M54HC107F1R M74HC107 M74HC107B1R M74HC107C1R M74HC107M1R jk flip flop cmos

    74hc128

    Abstract: 74HC9046 74hct7014 74HCT4050 74HC273 74HC1284 74hc14 philips 74HC7014 74hct133 74HCT73
    Text: INTEGRATED CIRCUITS Package information Supersedes data of 1999 Sep 22 File under Integrated Circuits, IC06 2001 Nov 02 Philips Semiconductors Package information PACKAGE INFORMATION PART NO DIP N SO (D) SSOP (DB) TSSOP (PW) PIN COUNT 74HCU04 27-1 108-1


    Original     		PDF 74HCU04 74HCTU04 74HC00 74HCT00 74HC02 74HCT02 74HC03 74HCT03 74HC04 74HCT04 74hc128 74HC9046 74hct7014 74HCT4050 74HC273 74HC1284 74hc14 philips 74HC7014 74hct133 74HCT73

    74HC9046

    Abstract: 74hc128 74HCT4050 74HC1284 74hct133 74HCT4049 74HC7014 74hc164 74HC192 74HC93
    Text: INTEGRATED CIRCUITS Package information Supersedes data of 1999 Jul 09 File under Integrated Circuits, IC06 1999 Sep 22 Philips Semiconductors Package information PACKAGE INFORMATION PART NO DIP N SO (D) SSOP (DB) TSSOP (PW) PIN COUNT 74HCU04 27-1 108-1


    Original     		PDF 74HCU04 74HCTU04 74HC00 74HCT00 74HC02 74HCT02 74HC03 74HCT03 74HC04 74HCT04 74HC9046 74hc128 74HCT4050 74HC1284 74hct133 74HCT4049 74HC7014 74hc164 74HC192 74HC93

    74HC9046

    Abstract: 74HCT4050 74hct7014 74HCT4049 74HC7541 74hct133 74HC9046A 74HC90 74HCT4059 74HC5555
    Text: INTEGRATED CIRCUITS Package information Supersedes data of 2001 Nov 02 File under Integrated Circuits, IC06 Philips Semiconductors 2002 Aug 08 Philips Semiconductors Package information PACKAGE INFORMATION PART NUMBER DIL N SO (D) SSOP (DB) TSSOP (PW) PIN COUNT


    Original     		PDF 74HCU04 74HCTU04 74HC00 74HCT00 74HC02 74HCT02 74HC03 74HCT03 74HC04 74HC86 74HC9046 74HCT4050 74hct7014 74HCT4049 74HC7541 74hct133 74HC9046A 74HC90 74HCT4059 74HC5555

    74hc128

    Abstract: 74HCT4050 74HC273 74HC7014 74HC9046 74hct133 74HCT273 74HC1284 74HCT7597 74HC4059
    Text: INTEGRATED CIRCUITS Package information Supersedes data of 1999 Jul 09 File under Integrated Circuits, IC06 1999 Sep 22 Philips Semiconductors Package information PACKAGE INFORMATION PART NO DIP N SO (D) SSOP (DB) TSSOP (PW) PIN COUNT 74HCU04 27-1 108-1


    Original     		PDF 74HCU04 74HCTU04 74HC00 74HCT00 74HC02 74HCT02 74HC03 74HCT03 74HC04 74HCT04 74hc128 74HCT4050 74HC273 74HC7014 74HC9046 74hct133 74HCT273 74HC1284 74HCT7597 74HC4059

    74HC9046

    Abstract: 74hct4050 74HC273 CMOS TTL Logic Family Specifications 74hc245 74HCT297 74hc154 application 74hct133 74hc297 application notes 74HC7014 74HCT299
    Text: INTEGRATED CIRCUITS DATA SHEET FAMILY SPECIFICATIONS HCMOS family characteristics March 1988 File under Integrated Circuits, IC06 INTEGRATED CIRCUITS DATA SHEET Package outline drawings January 1996 File under Integrated Circuits, IC06 Philips Semiconductors


    Original     		PDF OT27-1 OT38-4 OT146-1 OT101-1 OT222-1 OT117-1 74HCU 74HCT 74HC9046 74hct4050 74HC273 CMOS TTL Logic Family Specifications 74hc245 74HCT297 74hc154 application 74hct133 74hc297 application notes 74HC7014 74HCT299

    TDA 9350 PS

    Abstract: B2A PCB Hex Rockwell Collins mechanical Filters TDA XIA transistor 928 mps a14 NEC REED RELAY ne5534 equalizer rockwell EQM AF5B
    Text: RFX144V24-S23 and RFX96V24-S23 MONOFAX Modems Designer's Guide Preliminary Order No. 1070 February 14, 1996 RFX144V24-S23 and RFX96V24-S23 Modem Designer’s Guide NOTICE Information furnished by Rockwell International Corporation is believed to be accurate and reliable. However, no


    Original     		PDF RFX144V24-S23 RFX96V24-S23 TDA 9350 PS B2A PCB Hex Rockwell Collins mechanical Filters TDA XIA transistor 928 mps a14 NEC REED RELAY ne5534 equalizer rockwell EQM AF5B

    lm294oct

    Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
    Text: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12


    Original     		PDF 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 lm294oct d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C

    Untitled

    Abstract: No abstract text available
    Text: GD54/74HC107, GD54/74HCT107 DUAL J-K FLIP-FLOPS WITH CLEAR General Description These devices are identical in pinout to the 5 4 /7 4 L S 1 0 7 . They consist of two J-K flip-flops with individual J, K, clock, and clear inputs. These flipflops are edge sensitive to the clock input and


    OCR Scan     		PDF GD54/74HC107, GD54/74HCT107

    MC54HC107

    Abstract: No abstract text available
    Text: MOTOROLA SEM IC O N D U C TO R TECHNICAL DATA MC54/74HC107 Dual J-K Flip-Flop w ith Reset H ig h -P erfo rm an ce S ilicon-G ate C M O S J SUFFIX CERAMIC CASE 632-08 The M C 54/74H C 10 7 is iden tical m p in o u t to th e LS107. The device in p u ts are c o m p a tib le w ith standard C M O S o u to u ts ; w ith pull up resistors, they are c o m p a tib le


    OCR Scan     		PDF MC54/74HC107 MC54HC107 MC74HC107 LS107. HC107

    74LS107

    Abstract: No abstract text available
    Text: r z 7 S C S -T H O M S O N Ä 7 # M ^è [i^ OT(Q*S M 54HC 107 M 74HC107 DUAL J-K FLIP FLOP WITH CLEAR HIGH SPEED 75 MHz (TYP.) AT Vcc = 5 V LOW POWER DISSIPATION Ice = 2 nA (MAX.) AT Ta = 25 "C HIGH NOISE IMMUNITY V n ih = V nil = 28 % V c c (MIN.) OUTPUT DRIVE CAPABILITY


    OCR Scan     		PDF 74HC107 54/74LS107 107F1R 107B1R M54/74HC107 74LS107

    Untitled

    Abstract: No abstract text available
    Text: I Æ 7 SGS-THOMSON *7# [IDœtKLtKgTORiDigi M54HC107 M74HC107 DUAL J-K FLIP FLOP WITH CLEAR • HIGH SPEED fMAX = 58 MHz TYP. at VCc = 5V ■ LOW POWER DISSIPATION lCC = 2 ;tA (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY V N IH = VN|L = 28% VCC (MIN.)


    OCR Scan     		PDF M54HC107 M74HC107 M54HC107 M74HC107 54/74LS M54/74HC107 S-102U

    Untitled

    Abstract: No abstract text available
    Text: SbE ]> • 7TETS37 003*1631 30Ö ■ S 6 T H S C S -T H O M S O N H iO T O G M M 5 4 H C 107 M 7 4 H C 107 S G T -K -0 7 -0 7 S-THOMSON DUAL J-K FLIP FLOP WITH CLEAR ■ H IG H S P E E D fMAX = 58 MHz TYP. at VCC= 5V ■ LOW POWER DISSIPATION Ice = 2 vA (MAX.) at TA = 25°C


    OCR Scan     		PDF 7TETS37 M54HC107 M74HC107 M74HC107 54/74HC107

    Untitled

    Abstract: No abstract text available
    Text: Technical Data CD54/74HC107 CD54/74HCT107 File N um ber 1722 High-Speed CMOS Logic Dual J-K Flip-Flop with Reset N egative-E dge T rigg er Type Features: • _ x GNO • 7 Vcc ' 14 92CS - 39416 H ysteresis on c lo c k in p u ts fo r im proved noise im m u n ity a n d increased


    OCR Scan     		PDF CD54/74HC107 CD54/74HCT107 54/74HC 54/74HCT

    74hc107

    Abstract: M74HC107B1N
    Text: / = T M54HC107 M74HC107 S G S -T H O M S O N « [10 [ M S I g ^ ( ô i0(gS DUAL J-K FLIP FLOP WITH CLEAR • HIGH SPEED f MAX = 58 M Hz (TYP.) at VC C = 5V ■ LOW POW ER DISSIPATION lCc = 2 nA (MAX.) at TA = 25°C ■ HIGH NOISE IM M U NITY V n ih = V NIL = 2 8 % VCC (MIN.)


    OCR Scan     		PDF M54HC107 M74HC107 54/74LS107 M74HC107 M54/74HC107 74hc107 M74HC107B1N

    74HC107

    Abstract: No abstract text available
    Text: Technical Data CD54/74HC107 CD54/74HCT107 File N u m b e r 1722 High-Speed CMOS Logic Dual J-K Flip-Flop with Reset N egative-E d g e T rigger Type Features: • zr GND * 7 v c c *14 92CS- 594 16 H y s te re s is o n c lo c k in p u ts fo r im p ro v e d n o is e im m u n ity a n d in c re a s e d


    OCR Scan     		PDF CD54/74HC107 CD54/74HCT107 CD54/74HCT107 54/74HC 54/74HCT 74HC107

    74LS107M

    Abstract: IC 74LS107
    Text: S G S -T H O M S O N R iiæ m iM Q iO g i m s 4 H C 107 M 74HC107 DUAL J-K FLIP FLOP WITH CLEAR • HIG HSPEED f MAX = 75 MHz TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION lec = 2 jiA (MAX.) AT T a = 25 °C ■ HIGH NOISE IMMUNITY V nih = V n il = 28 % V cc (MIN.)


    OCR Scan     		PDF 74HC107 54/74LS107 107F1R 107B1R M54/74HC107 74LS107M IC 74LS107

    of 74HC107 ic

    Abstract: 74hc107 54HC 74HC M54HC107 M74HC107 M74HC107B1N j-k flip flop clock toggle IC 74LS107 M74HC107B1
    Text: I S G S -T H O M S O N 7 / M 5 4 H C 107 M 74 H C 107 RiilD g[S IlL[i(gTns®R!lD(gi DUAL J-K FLIP FLOP WITH CLEAR i HIGH SPEED fMAX = 58 MHz (TYP. at V c c = 5V i LOW POW ER DISSIPATION Ic e = 2 iiA (MAX.) at TA = 2 5 °C i HIGH NOISE IM M U NITY Vnih = V N|L = 28% VCc (MIN.)


    OCR Scan     		PDF M54HC107 M74HC107 54/74LS107 M54/74HC107 M54/74HC107 of 74HC107 ic 74hc107 54HC 74HC M74HC107 M74HC107B1N j-k flip flop clock toggle IC 74LS107 M74HC107B1

    LM 4017 decade counter driver

    Abstract: 74HC7244A 74HCT7007A 74HC11A 74HC85A 74HC147 decimal to binary encoder cmos 4008 74HC21A 74HC07A 74HC7244
    Text: 2.H IG H SPEED CMOS SELECTION GUIDE NÄ N D NOR A ND OR IN V E R T E R ,B U F FE R 74HC00A 74HCT00A 74HC03A 74HC10A 74HC20A 74HC30 71HC132A 74HC133A GATE 74HC02A 74HCT02A 74HC27A 74HC4002A 74HC4078 74HC08A 74HCT08A 74HC09A 74HC11A 74HC21A 74HC32A 74HCT32A 74HC4072


    OCR Scan     		PDF 74HC00A 74HCT00A 74HC03A 74HC10A 74HC20A 74HC30 71HC132A 74HC133A 74HC02A 74HCT02A LM 4017 decade counter driver 74HC7244A 74HCT7007A 74HC11A 74HC85A 74HC147 decimal to binary encoder cmos 4008 74HC21A 74HC07A 74HC7244