SAR01
Abstract: Z80185 sar0
Text: USER’S MANUAL CHAPTER 4 DIRECT MEMORY ACCESS 4.1 INTRODUCTION This chapter describes the Direct Memory Access DMA channels of the Z80185/195: their characteristics, operation, and programming. 4.2 DMA OVERVIEW The Z80185 includes a two-channel DMA (Direct Memory
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Z80185/195:
Z80185
20-bit
UM971800200
SAR01
sar0
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Scatter-Gather direct memory access SG-DMA
Abstract: memory access (DMA) controller Scatter-Gather CRC-32 QII55003-7 constructs
Text: 5. Scatter-Gather DMA Controller Core QII55003-7.1.0 Core Overview The Scatter-Gather direct memory access SG-DMA controller core implements high-speed data transfer between two devices. The SG-DMA core can be used to transfer data from: • ■ ■ memory to memory
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QII55003-7
Scatter-Gather direct memory access SG-DMA
memory access (DMA) controller
Scatter-Gather
CRC-32
constructs
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SPRU375
Abstract: TMS320C5000 TMS320VC5501 TMS320VC5502 TMS320VC5501 dma config
Text: TMS320VC5501/5502 DSP Direct Memory Access DMA Controller Reference Guide Literature Number: SPRU613G March 2005 Preface Read This First About This Manual This manual describes the features and operation of the direct memory access (DMA) controller that is available on the TMS320VC5501 and
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TMS320VC5501/5502
SPRU613G
TMS320VC5501
TMS320VC5502
TMS320C55xTM
C55xTM)
SPRU375
TMS320C5000
TMS320VC5501 dma config
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dma controller
Abstract: ADPS-21061 ADSP-21060 reference manual DATASHEET OF DMA ADSP21060 ADSP-21060 ADSP21061 ADSP-21061 ADSP21062 ADSP-21062
Text: DMA 6.1 6 OVERVIEW Direct Memory Access DMA provides a mechanism for transferring an entire block of data. The ADSP-2106x’s on-chip DMA controller relieves the core processor of the burden of moving data between internal memory and an external data source or external memory. The
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ADSP-2106x
dma controller
ADPS-21061
ADSP-21060 reference manual
DATASHEET OF DMA
ADSP21060
ADSP-21060
ADSP21061
ADSP-21061
ADSP21062
ADSP-21062
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DSP56300
Abstract: CDP 8163
Text: 8 DMA CONTROLLER The Direct Memory Access DMA Controller is an on-chip device that permits data transfers between internal/external memory and/or internal/external I/O in any combination, without intervention of the program. Due to dedicated DMA address and
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DSP56300
CDP 8163
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STM8L
Abstract: rm0031 PWM example sTM8l STM8L162 adc dma her nv stm8l dma AN3117 STM8 spi programming manual STM8L CPU programming manual TIM5
Text: AN3117 Application note Using the STM8L15x/STM8L162 DMA controller Introduction This application note describes how to use the direct memory access DMA controller of the STM8L15x and STM8L162. The DMA controller, the STM8 core, and the memory system contribute to provide a high
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AN3117
STM8L15x/STM8L162
STM8L15x
STM8L162.
RM0031)
STM8L162
STM8L
rm0031
PWM example sTM8l
adc dma her nv
stm8l dma
AN3117
STM8 spi programming manual
STM8L CPU programming manual
TIM5
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PC 1498H
Abstract: 1444H A6779 1484H PAR64 REQ64
Text: DMA Controller Unit 19 This chapter describes the integrated Direct Memory Access DMA Controller Unit. The operation modes, setup, external interface, and implementation of the DMA Controller are detailed in this chapter. 19.1 Overview The DMA Controller provides low-latency, high-throughput data transfer capability. The DMA
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32-bit
64-bit
PC 1498H
1444H
A6779
1484H
PAR64
REQ64
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vhdl code for 4 channel dma controller
Abstract: DS472 vhdl code dma controller dma spartan 3
Text: OPB Central DMA Controller DS472 December 1, 2005 Product Specification Introduction LogiCORE Facts The OPB Central DMA Controller provides simple Direct Memory Access DMA services for peripherals and memory devices on the OPB bus. The controller moves a programmable quantity of data from a source address to a
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DS472
vhdl code for 4 channel dma controller
vhdl code dma controller
dma spartan 3
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TMS320C5000
Abstract: TMS320C5000 structure TMS320C54x, instruction set C5000 SPRU131 SPRU302
Text: Application Report SPRA641 - March 2000 TMS320C5000 DMA Applications Ramesh A. Iyer DSP West Applications ABSTRACT A Direct Memory Access DMA controller is available on select members of the TMS320C5000 family of digital signal processors (DSPs). The DMA controller is used to
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SPRA641
TMS320C5000
TMS320C5000 structure
TMS320C54x, instruction set
C5000
SPRU131
SPRU302
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adc dma her nv
Abstract: PWM example sTM8l STM8 CPU programming manual STM8L STM8l one pulse mode stm8l dma AN3117 RM0031 STM8L CPU programming manual STM8L spi
Text: AN3117 Application note Using the STM8L15x DMA controller Introduction This application note describes how to use the STM8L15x direct memory access DMA controller. The DMA controller, the STM8 core, and the memory system contribute to provide a high data bandwidth and to develop very-low latency response time software.
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AN3117
STM8L15x
RM0031)
adc dma her nv
PWM example sTM8l
STM8 CPU programming manual
STM8L
STM8l one pulse mode
stm8l dma
AN3117
RM0031
STM8L CPU programming manual
STM8L spi
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TMS320C5000
Abstract: TMS320C5000 structure C5000 SPRU131 SPRU302
Text: Application Report SPRA641 - March 2000 TMS320C5000 DMA Applications Ramesh A. Iyer DSP West Applications ABSTRACT A Direct Memory Access DMA controller is available on select members of the TMS320C5000 family of digital signal processors (DSPs). The DMA controller is used to
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TMS320C5000
TMS320C5000 structure
C5000
SPRU131
SPRU302
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ADSP-2185 bootloader
Abstract: Linker & Utilities Manual for ADSP-218x & ADSP-219x Family DSPs ADSP-2181 ADSP-2183 ADSP-2184 ADSP-2184L ADSP-2187L ADSP-2188 ADSP-2188M ADSP-2189
Text: 9 DMA PORTS Figure 9-0. Table 9-0. Listing 9-0. Overview The ADSP-218x processors include the following DMA interfaces: • Byte Memory Space and Byte Memory DMA BDMA — The byte memory space can address up to 4M bytes. The BDMA interface supports booting from and runtime access to inexpensive 8-bit
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ADSP-218x
16-bit
ADSP-2185 bootloader
Linker & Utilities Manual for ADSP-218x & ADSP-219x Family DSPs
ADSP-2181
ADSP-2183
ADSP-2184
ADSP-2184L
ADSP-2187L
ADSP-2188
ADSP-2188M
ADSP-2189
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Untitled
Abstract: No abstract text available
Text: LatticeMico DMA Controller The LatticeMico DMA controller is a direct memory access controller that provides a master read port, a master write port, and one slave port to control data transmission. Version This document describes the 3.3 version of the LatticeMico DMA controller.
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AT91M40400
Abstract: No abstract text available
Text: Software DMA Implementation Introduction A DMA Direct Memory Access Controller allows fast data transfers between memories without using the CPU. The transfer is activated by an external event. The control signals and the address and data buses are managed by the DMA controller.
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TSC695
Abstract: No abstract text available
Text: Active Errata List • DMA Access Request During Processor LOCK Accesses • BUSRDY* and Waitstates on Exchange Memory Area Errata History Product Release Errata List All lot numbers 1, 2 Errata Description 1. DMA Access Request During Processor LOCK Accesses
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4280C
TSC695
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making code DMA
Abstract: A1023 B1023 C1023 C6000 TMS320C6000 TMS320C6201 SPRA529 0x02008000 0x00000088
Text: Application Report SPRA529 TMS320C6000 DMA Example Applications David Bell Digital Signal Processing Solutions Abstract The TMS320C6000 on-chip direct memory access DMA controller from Texas Instruments (TIä) is used to transfer data between two locations in the memory map in the background of
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SPRA529
TMS320C6000
making code DMA
A1023
B1023
C1023
C6000
TMS320C6201
SPRA529
0x02008000
0x00000088
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VL82C37A-08PC
Abstract: VL82C37A DR 6236 Pin Details of bus controller IC 8282 vl82c3
Text: V L S I T e c h n o lo g y , in c . VL82C37A CMOS DIRECT MEMORY ACCESS DMA CONTROLLER FEATURES DESCRIPTION • Low-power CMOS version of popular 8237A DMA controller The VL82C37A Direct Memory Access (DMA) Controller serves as a peripheral interface circuit for microprocessor
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VL82C37A
VL82C37A
VL82C37A-08,
VL82C37A-08PC
DR 6236
Pin Details of bus controller IC 8282
vl82c3
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Z80SIO
Abstract: z80 mpu
Text: T O SH IB A TMPZ84C10A TM PZ84C10AP-6 / TM PZ84C10AM-6 /TMPZ84C10AT-6 CMOS-Z8O DMA : DIRECT MEMORY ACCESS CONTROLLER 1. GENERAL DESCRIPTION AND FEATURES TMPZ84C10A hereinafter referred to as DMA is th e CMOS Z80 DMA (Direct Memory Access Controller) which provides low power consum ing b u t pow erful and
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TMPZ84C10A
PZ84C10AP-6
PZ84C10AM-6
/TMPZ84C10AT-6
TMPZ84C10A
MPUZ80-164
Z80SIO
z80 mpu
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1271A0
Abstract: M68300 MC68340 MC68341 STR 6622 AS68K
Text: SECTION 6 DMA CONTROLLER MODULE The direct memory access DMA controller module provides for high-speed transfer capability to/from an external peripheral or for memory-to-memory data transfer. The DMA module, shown in Figure 6-1, provides two channels that allow byte, word, or long-word
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32-Bit
D15-D0
M68300
MC68341
AS68K
1271A0
MC68340
STR 6622
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SIM49
Abstract: S4 78A 1271A0 M68000 M68300 MC68349
Text: SECTION 7 DMA CONTROLLER MODULE The direct memory access DMA controller module provides for high-speed transfer capability to/from an external peripheral or for memory-to-memory data transfer. The DMA module, shown in Figure 7-1, provides two channels that allow byte, word, or long-word
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32-Bit
MC68349
SIM49
S4 78A
1271A0
M68000
M68300
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PA3029
Abstract: D71037 6265a nec v30 HPD70108 HPD71037 HPD71082 JJPD71037 PD71037 D 71086
Text: NEC JJPD71037 Direct Memory Access DMA Controller NEC Electronics Inc. Description The |iPD71037 is a direct memory access (DMA) control ler that provides high-speed data transfers between peripheral devices and memory fo r microprocessor sys tems. It is faster and draws less power than its predeces
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uPD71037
PD71037CZ-10
iPD71037
64K-byte
ftPD71037
ffPD71037
83vB-6S23B
pPD71037
83v8-6518B
PD71037
PA3029
D71037
6265a
nec v30
HPD70108
HPD71037
HPD71082
JJPD71037
PD71037
D 71086
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M68000
Abstract: MC68340 SIM40
Text: SECTION 6 DMA CONTROLLER MODULE The direct memory access DMA controller module provides for high-speed transfer capability to/from an external peripheral or for memory-to-memory data transfer. The DMA module, shown in Figure 6-1, provides two channels that allow byte, word, or long-word
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32-Bit
16-Bit
MC68340
M68000
SIM40
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OTAQ
Abstract: bma 023 DS32N Bull Micral of America data of car driving licence holders 000D AZ9011 Car Central lock system TDI A29011
Text: A Z 9011 Bus Master DMA Controller* Introduction The AZ9011 provides eight channels of Direct Memory Access DMA . The system microprocessor programs the DMA registers via the Micro Channel* for the various modes of operation, transfer addresses and transfer
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AZ90H
AZ9011
programm25
AZ9011
12/iaÂ
OTAQ
bma 023
DS32N
Bull Micral of America
data of car driving licence holders
000D
Car Central lock system TDI
A29011
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80C88
Abstract: CA82C37A MD500 S21-S22
Text: CA82C37A CRL PROGRAMMABLE DMA CONTROLLER Pin and functional compatibility with the industry standard 8237/8237A The CA82C37A is a high performance, programmable Direct Memory Access DMA controller offering pin-forpin functional compatibility with the industry standard
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CA82C37A
8237/8237A
CA82C37A
80C88
MD500
S21-S22
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