ARMv6
Abstract: A3PE600L A3PE3000L A3P1000 application notes GTL33 A3P1000 AES-128 FG144 FG484 PQ208
Text: Revision 0 Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Military Temperature Tested and Qualified • Each Device Tested from –55°C to 125°C Firm-Error Immune • Not Susceptible to Neutron-Induced Configuration Loss
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rneg2
Abstract: XRT83L314 XRT83L314IB
Text: PRELIMINARY XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT NOVEMBER 2003 REV. P1.0.3 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection,
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XRT83L314
14-CHANNEL
16-bit
XRT83L314
rneg2
XRT83L314IB
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led driver 7seg
Abstract: XRT83L314 XRT83L314IB RNEG10
Text: XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT MAY 2004 REV. 1.0.0 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection,
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XRT83L314
14-CHANNEL
16-bit
XRT83L314
led driver 7seg
XRT83L314IB
RNEG10
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hp2 800 232
Abstract: E1 HDB3 99279 TPI28 TCI26 TPI14
Text: TEMx28 Device 28 Channel Dual Bus High Density Mapper TXC-04222 FEATURES DESCRIPTION • Add/drop up to 28 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses • Add bus and drop bus timing modes • Cross mapping applications DS1 mapped to/from
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TEMx28
TXC-04222
VT2/TU-12s)
TXC-04222-MB,
hp2 800 232
E1 HDB3
99279
TPI28
TCI26
TPI14
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT SEPTEMBER 2003 REV. P1.0.2 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection,
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XRT83L314
14-CHANNEL
16-bit
XRT83L314
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dbpe 103
Abstract: me520B Tepro Technology TXC-04222 683XX au3a A1UA circuit diagram of fm transmitter and receiver E1 HDB3 K9K14
Text: TEMx8 Device 8 Channel Dual Bus Mapper TXC-04218 FEATURES DESCRIPTION • Add/drop up to 8 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses • Add bus and drop bus timing modes • Cross mapping applications DS1 mapped to/from
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TXC-04218
VT2/TU-12s)
TXC-04218-MB,
dbpe 103
me520B
Tepro Technology
TXC-04222
683XX
au3a
A1UA
circuit diagram of fm transmitter and receiver
E1 HDB3
K9K14
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TPI20
Abstract: TXC-03114 TPI13
Text: TEMx28 Device 28 Channel Dual Bus High Density Mapper TXC-04222 DATA SHEET • Add/drop up to 28 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses • Add bus and drop bus timing modes • Cross mapping applications DS1 mapped to/from
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TEMx28
TXC-04222
VT2/TU-12s)
TXC-04222-MB
TPI20
TXC-03114
TPI13
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tpi22
Abstract: No abstract text available
Text: TEMx28 Device 28 Channel Dual Bus High Density Mapper TXC-04222 DATA SHEET PRODUCT PREVIEW • Add/drop up to 28 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses • Add bus and drop bus timing modes • Cross mapping applications DS1 mapped to/from
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TEMx28
TXC-04222
VT2/TU-12s)
TXC-04222-MB
tpi22
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TPI15
Abstract: tpi22 929 rev oh S29 ba3302 me520B RCO22 RCO20 TXC-04222AIOG RPO14 ba7307
Text: TEMx28 Device 21/28 Channel Dual Bus High Density Mapper TXC-04222 DESCRIPTION • Add/drop up to 28 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses • Add bus and drop bus timing modes • Cross mapping applications DS1 mapped to/from
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TEMx28
TXC-04222
VT2/TU-12s)
TPI15
tpi22
929 rev oh S29
ba3302
me520B
RCO22
RCO20
TXC-04222AIOG
RPO14
ba7307
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XRT83SL314
Abstract: XRT83SL314IB
Text: PRELIMINARY XRT83SL314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT NOVEMBER 2003 REV. P1.0.5 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection,
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XRT83SL314
14-CHANNEL
16-bit
XRT83SL314
14-channel
XRT83SL314IB
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X009
Abstract: MGAB A10 fbnl MGAB
Text: TEMx28 Device 21/28 Channel Dual Bus High Density Mapper TXC-04222 DESCRIPTION • Add/drop up to 28 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses • Add bus and drop bus timing modes • Cross mapping applications DS1 mapped to/from
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TEMx28
TXC-04222
VT2/TU-12s)
TXC-04222-MB
X009
MGAB A10
fbnl
MGAB
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XRT83SL314
Abstract: XRT83SL314IB
Text: XRT83SL314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT MAY 2004 REV. 1.0.0 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection, TAOS, DMO, and diagnostic loopback modes.
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XRT83SL314
14-CHANNEL
16-bit
XRT83SL314
14-channel
XRT83SL314IB
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XRT83SL314
Abstract: XRT83SL314IB
Text: xr XRT83SL314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT MARCH 2005 REV. 1.0.1 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection, TAOS, DMO, and diagnostic loopback modes.
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XRT83SL314
14-CHANNEL
16-bit
XRT83SL314
14-channel
XRT83SL314IB
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY XRT83SL314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT SEPTEMBER 2003 REV. P1.0.4 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection,
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XRT83SL314
14-CHANNEL
16-bit
XRT83SL314
14-channel
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hp-1100
Abstract: TL3M hp1100 TXC-03453B
Text: TL3M Device Triple Level 3 Mapper TXC-03453B DATA SHEET SDH/SONET SIDE TELECOM BUS O-Bit Interfaces • Add/drop multiplexers • Digital cross connect systems • Broadband switching systems • Transmission equipment External Alarm Interfaces Drop Bus
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TXC-03453B
TXC-03453B-MB,
hp-1100
TL3M
hp1100
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HDB3
Abstract: df2a SOT
Text: TL3M Device Triple Level 3 Mapper TXC-03453B DATA SHEET Each of the three channels of the TL3M can map a DS3 line signal into an STM-1 TUG-3 or STS-3 STS-1 SPE SDH/SONET signal. An E3 signal can be mapped only into an STM-1 TUG-3. The TL3M interfaces to an STM-1 or STS-3 SDH/SONET signal
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TXC-03453B
TXC-03453B-MB
HDB3
df2a SOT
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intel 7882
Abstract: TXC-03453AI df2a df2e TXC-03453B
Text: TL3M Device Triple Level 3 Mapper TXC-03453B DATA SHEET SDH/SONET SIDE TELECOM BUS O-Bit Interfaces • Add/drop multiplexers • Digital cross connect systems • Broadband switching systems • Transmission equipment External Alarm Interfaces Drop Bus
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TXC-03453B
TXC-03453B-MB
intel 7882
TXC-03453AI
df2a
df2e
TXC-03453B
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Untitled
Abstract: No abstract text available
Text: TL3M Device Triple Level 3 Mapper TXC-03453 DATA SHEET PRODUCT PREVIEW SDH/SONET SIDE TELECOM BUS O-Bit Interfaces APPLICATIONS • Add/drop multiplexers • Digital cross connect systems • Broadband switching systems • Transmission equipment External
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TXC-03453
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df2e
Abstract: TXC-03453 TXC-06103
Text: TL3M Device Triple Level 3 Mapper TXC-03453 DATA SHEET Each of the three channels of the TL3M can map a DS3 line signal into an STM-1 TUG-3 or STS-3 STS-1 SPE SDH/SONET signal. An E3 signal can be mapped only into an STM-1 TUG-3. The TL3M interfaces to an STM-1 or STS-3 SDH/SONET signal
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TXC-03453
TXC-03453-MB
df2e
TXC-03453
TXC-06103
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DMO11
Abstract: DMO10 0X00 GR-253 GR-499-CORE XRT73R12 XRT73R12IB em7 120 cc11r
Text: XRT73R12 PRELIMINARY TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT OCTOBER 2003 REV. P1.0.3 GENERAL DESCRIPTION The XRT73R12 provides a Parallel Microprocessor Interface for programming and control. The XRT73R12 is a twelve channel fully integrated Line Interface Unit LIU featuring EXAR’s R3
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XRT73R12
XRT73R12
DMO11
DMO10
0X00
GR-253
GR-499-CORE
XRT73R12IB
em7 120
cc11r
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DMO11
Abstract: DMO10 CR-148
Text: XRT73R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT DECEMBER 2006 REV. 1.0.1 GENERAL DESCRIPTION The XRT73R12 provides a Parallel Microprocessor Interface for programming and control. The XRT73R12 is a twelve channel fully integrated Line Interface Unit LIU featuring EXAR’s R3
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XRT73R12
XRT73R12
DMO11
DMO10
CR-148
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Untitled
Abstract: No abstract text available
Text: XRT73R12 PRELIMINARY TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT SEPTEMBER 2003 REV. P1.0.1 GENERAL DESCRIPTION The XRT73R12 provides a Parallel Microprocessor Interface for programming and control. The XRT73R12 is a twelve channel fully integrated Line Interface Unit LIU featuring EXAR’s R3
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XRT73R12
XRT73R12
XRT73Rs
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DMO11
Abstract: DMO10 CR-196
Text: XRT73R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT APRIL 2006 REV. 1.0.0 GENERAL DESCRIPTION The XRT73R12 provides a Parallel Microprocessor Interface for programming and control. The XRT73R12 is a twelve channel fully integrated Line Interface Unit LIU featuring EXAR’s R3
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XRT73R12
XRT73R12
DMO11
DMO10
CR-196
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XRT83SH314
Abstract: XRT83SH314IB e1-tx 8051 Read Write for 80c188 rneg2
Text: XRT83SH314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT OCTOBER 2006 REV. 1.0.4 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS/PRBS generation/detection, TAOS, DMO, and diagnostic loopback modes.
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XRT83SH314
14-CHANNEL
16-bit
XRT83SH314
14-channel
XRT83SH314IB
e1-tx
8051 Read Write for 80c188
rneg2
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