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    LC112 Search Results

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    LC112 Price and Stock

    STMicroelectronics DALC112S1RL

    TVS DIODE 15VWM 8-SOIC
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    DigiKey DALC112S1RL Cut Tape 7,364 1
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    DALC112S1RL Digi-Reel 7,364 1
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    DALC112S1RL Reel 5,000 2,500
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    Avnet Americas DALC112S1RL Reel 5,000 15 Weeks 2,500
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    Mouser Electronics DALC112S1RL 4,472
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    Newark DALC112S1RL Cut Tape 2,540 5
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    DALC112S1RL Reel 2,500
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    DALC112S1RL Reel 2,500
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    STMicroelectronics DALC112S1RL 4,472 1
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    Bristol Electronics DALC112S1RL 4,728
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    DALC112S1RL 240 5
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    ComSIT USA DALC112S1RL 9,400
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    Avnet Silica DALC112S1RL 2,500 16 Weeks 2,500
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    EBV Elektronik DALC112S1RL 16 Weeks 2,500
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    Win Source Electronics DALC112S1RL 77,000
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    Finisar Corporation FTLC1122SDNL

    4X28G LAN WDM DFB 4X28G PIN OTU4
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    DigiKey FTLC1122SDNL Tray 1 1
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    STMicroelectronics DALC112S1

    TVS DIODE 15VWM 8-SOIC
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    DigiKey DALC112S1 Tube 2,000
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    Bristol Electronics DALC112S1 17,134
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    DALC112S1 1,255
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    ComSIT USA DALC112S1 6,961
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    Bivar Inc LC1-12.0-F7P-6

    LIGHT PIPE FLEXIBLE 12" 6.9MM
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    DigiKey LC1-12.0-F7P-6 Bulk 100
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    Mouser Electronics LC1-12.0-F7P-6
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    Bivar Inc LC1-12.0-F7P-5

    LIGHT PIPE FLEXIBLE 12" 6.9MM
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    DigiKey LC1-12.0-F7P-5 Bulk 100
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    Mouser Electronics LC1-12.0-F7P-5
    • 1 $3.35
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    • 100 $1.85
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    LC112 Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    LC-11.25 Bivar Optoelectronics - Optics - Light Pipes - LIGHT PIPE 1MM 11.25" 4MM DIA Original PDF

    LC112 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: UNISONIC TECHNOLOGIES CO., LTD LC1126 Preliminary LINEAR INTEGRATED CIRCUIT ULTRA LOW OUTPUT VOLTAGE LINEAR N-FET CONTROLLER „ 5 6 DESCRIPTION The UTC LC1126 is an ultra low output voltage linear N-FET controller designed to provide well supply voltage for


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    PDF LC1126 LC1126 SC-59-6 QW-R102-050

    Untitled

    Abstract: No abstract text available
    Text: UNISONICTECHNOLOGIESCO., LTD LC1126 Preliminary LINEAR INTEGRATED CIRCUIT U LT RA LOW OU T PU T V OLT AGE LI N EAR N -FET CON T ROLLER 5 4 6 ̈ DESCRI PT I ON The UTC LC1126 is an ultra low output voltage linear N-FET controller designed to provide well supply voltage for


    Original
    PDF LC1126 LC1126 SC-59-6 QW-R102-050

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


    Original
    PDF SN74LVC112A SCAS289L 000-V A114-A) A115-A) SNS74LVC2G53 scyb014 scyb005 scym001

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


    Original
    PDF SN74LVC112A SCAS289L 000-V A114-A) A115-A)

    LCV112A

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289I – JANUARY 1993 – REVISED MARCH 2002 D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Inputs Accept Voltages to 5.5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN74LVC112A SCAS289I 000-V A114-A) A115-A) LCV112A

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


    Original
    PDF SN74LVC112A SCAS289L 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


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    PDF SN74LVC112A SCAS289L 000-V A114-A) A115-A)

    34AE

    Abstract: No abstract text available
    Text: Qualification Test Report 501-78143 Was TR-98071 19MAY09 Rev. A1 認定試験報告書 Super Seal Connector SUPER SEAL コ ネ ク タ 1. 目的 製品規格 108-78140 (旧仕様書番号PS-1171)に基づきSUPER SEALコネクタ60極ASS’Y の総合評価試験を行う。


    Original
    PDF TR-98071) 19MAY09 PS-1171) TP-515 CCM-101 MC6625-8CS TCM-500 LC-112 NR-250 PC-9821Nd 34AE

    5D10L

    Abstract: ND R315 F001B schematic atx 2.03 P4 CC186 7805 stmicroelectronics 2n2222 h 331 74fct521atq 2N3904 B48 712C
    Text: 1 2 3 4 5 6 CONSUMER-SBD D D Evaluation board based on STPC CONSUMER-S/ELITE/CONSUMER-II full compatibility 1.1 SA000106 October 12, 2000 C C BOARD DESCRIPTION: FILE NAME - Motherboard in ATX format. - STPC interfaces : * Standard Super-VGA monitor output


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    PDF SA000106 EVAL120 PAGE04 PAGE05 PAGE06 PAGE07 PAGE01 PAGE02 PAGE03 SAA7111A, 5D10L ND R315 F001B schematic atx 2.03 P4 CC186 7805 stmicroelectronics 2n2222 h 331 74fct521atq 2N3904 B48 712C

    ND R315

    Abstract: schematic atx 2.03 P4 fdc37b782 5K58 4AC125 RTCO ac9 AD9142 C226 7805 DER-20 RP5A
    Text: 1 2 3 4 5 6 RDCONSUMER-S D D Reference design based on STPC CONSUMER-S 1.1 SAA00029AAXX JULY 21, 2000 C C BOARD DESCRIPTION: FILE NAME - Motherboard in ATX format. - STPC interfaces : * Standard Super-VGA monitor output * 3 PCI slots * 3 ISA slots - Super I/O interfaces :


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    PDF SAA00029AAXX SAA7111A, PAGE14 PAGE08 PAGE09 PAGE10 PAGE11 PAGE12 PAGE13 EVAL120 ND R315 schematic atx 2.03 P4 fdc37b782 5K58 4AC125 RTCO ac9 AD9142 C226 7805 DER-20 RP5A

    LC112A

    Abstract: LVC112A A115-A C101 SN74LVC112A SN74LVC112AD
    Text: SN74LVC112A DUAL NEGATIVEĆEDGEĆTRIGGERED JĆK FLIPĆFLOP WITH CLEAR AND PRESET SCAS289K − JANUARY 1993 − REVISED OCTOBER 2003 D D D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 4.8 ns at 3.3 V


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    PDF SN74LVC112A SCAS289K 000-V A114-A) A115-A) LC112A LVC112A A115-A C101 SN74LVC112A SN74LVC112AD

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


    Original
    PDF SN74LVC112A SCAS289L 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: GENERAL PURPOSE POWER MANAGEMENT QUICK SELECTION GUIDE Switching Regulators, LDOs, Power Modules, FET Drivers, Analog Controllers INTERSIL POWER MANAGEMENT SOLUTIONS A HERITAGE OF POWERING INNOVATION Learn how Intersil’s power management technologies have


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    PDF LC-112

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


    Original
    PDF SN74LVC112A SCAS289L 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


    Original
    PDF SN74LVC112A SCAS289L 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


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    PDF SN74LVC112A SCAS289L 000-V A114-A) A115-A)

    Programmer Kit

    Abstract: User Guides LED Dot Matrix vhdl code 7 segment LED display project counter lc48 GCLR MARK 84 Pin PLCC Socket diode D6E dot matrix printer circuit diagram datasheet header 20X2
    Text: CPLD Development/Programmer Kit . User Guide -2 xxxxA–XXXXX–xx/xx CPLD Development/Programmer Kit User Guide Table of Contents Section 1 Introduction . 1-1


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    PDF

    A115-A

    Abstract: C101 SN74LVC112A SN74LVC112AD LC112A
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289K – JANUARY 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


    Original
    PDF SN74LVC112A SCAS289K 000-V A114-A) A115-A) A115-A C101 SN74LVC112A SN74LVC112AD LC112A

    EL B17 C242

    Abstract: EL B17 C244 SA8 357 man7 ND R315 md33 2n2222 -331 MD243 EVAL120 b30 c250
    Text: 1 2 3 4 5 6 CONSUMER-SBD D D Evaluation board based on STPC CONSUMER-S/ELITE/CONSUMER-II full compatibility 1.0 Reference number JANUARY 15, 2000 C C BOARD DESCRIPTION: FILE NAME - Motherboard in ATX format. - STPC interfaces : * Standard Super-VGA monitor output


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    PDF EVAL120 PAGE04 PAGE05 PAGE06 PAGE07 PAGE01 PAGE02 PAGE03 SAA7111A, CONND43 EL B17 C242 EL B17 C244 SA8 357 man7 ND R315 md33 2n2222 -331 MD243 b30 c250

    Untitled

    Abstract: No abstract text available
    Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V


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    PDF SN74LVC112A SCAS289L 000-V A114-A) A115-A)

    74HC09

    Abstract: K2108
    Text: r z T S G S -T H O M S O N M 5 4 H £ 2 2 [M r a [E L H @ [* S M 74HC 09 QUAD 2-INPUT AND GATE OPEN DRAIN HIGHSPEED 6 ns (TYP.) A T V cc = 5 V LOW POWER DISSIPATION Ice = 1 (iA (MAX.) AT Ta = 25 "C HIGH NOISE IMMUNITY V n ih = V n il = 28 % Vcc (MIN.)


    OCR Scan
    PDF 54/74LS09 09B1R M54/74H2 74HC09 K2108

    74HC09

    Abstract: 74HC09B
    Text: SGS-THOMSON Rffl0» [iy iM !0 gi ms4HC09 M74HC09 QUAD 2-INPUT AND GATE (OPEN DRAIN) • HIG HSPEED 1pd = 6 ns (TYP.) AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 JiA (MAX.) A T T a = 25°C ■ HIGH NOISE IMMUNITY V nih = V n il = 28 % V cc (MIN.) ■ OUTPUT DRIVE CAPABILITY


    OCR Scan
    PDF ms4HC09 M74HC09 54/74LSO0 M54/74HC09 74HC09 74HC09B

    IC 74LS00

    Abstract: 74LS00 gate diagram nand IC TTL 74LS00 M74HCT00
    Text: S G S -T H O M S O N jL iM s iO (g S M 5 4 H C T oo M74HCT00 QUAD 2-INPUT NAND GATE • H IG H S P E E D tp D = 12 ns (TYP.) AT V c c = 5 V ■ LO W PO W ER DISSIPATION Ice = 1 |iA (M AX.) A T T a = 2 5 °C ■ C O M P A TIB LE W ITH TTL O U TP U TS V ih = 2V (MIN.) V il = 0.8V (MAX)


    OCR Scan
    PDF M74HCT00 54/74LS00 54/74HCT00 IC 74LS00 74LS00 gate diagram nand IC TTL 74LS00

    74LS06D

    Abstract: IC TTL 74LS06 54hct08 74ls06 dip14 ttl 74ls06 74HCT08 4HCT08 M74HCT08
    Text: S G S -T H O M S O N jL iM s iO (g S 4HCT08 M74HCT08 m s QUAD 2-INPUT AND GATE • HIG HSPEED tpD = 12 ns (TYP.) AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 |iA (MAX.) A T T a = 25°C ■ COMPATIBLE WITH TTL OUTPUTS V ih = 2V (MIN.) V il = 0.8V (MAX)


    OCR Scan
    PDF 4HCT08 M74HCT08 54/74LS06 M54/74HCT08 74LS06D IC TTL 74LS06 54hct08 74ls06 dip14 ttl 74ls06 74HCT08 M74HCT08