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    LATCH 74LS 373 Search Results

    LATCH 74LS 373 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TCKE800NL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, WSON10B Visit Toshiba Electronic Devices & Storage Corporation
    TCKE812NL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, Fixed Over Voltage Clamp, WSON10B Visit Toshiba Electronic Devices & Storage Corporation
    TCKE712BNL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 13.2 V, 3.65 A, Latch, Adjustable Over Voltage Protection, WSON10 Visit Toshiba Electronic Devices & Storage Corporation
    TCTH022AE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Push-pull type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation
    TCTH022BE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Open-drain type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation

    LATCH 74LS 373 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LS374

    Abstract: No abstract text available
    Text: M M O T O R O L A SN54/74LS373 SN54/74LS374 OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT The S N 54/74LS 373 consists of eight latches with 3-state outputs for bus


    OCR Scan     		PDF 54/74LS SN54/74LS374 74LS374

    74L5373

    Abstract: 74L5374 74LS373 PIN CONFIGURATION AND SPECIFICATIONS 74LS374 pin configuration 74LS374 74LS373 74LS373 pin configuration 74S373 745373 74S374
    Text: Signetics 74LS373, 74LS374, S373, S374 Latches/Flip-Flops '373 Octal Transparent Latch With 3-State Outputs '374 Octal D Flip-Flop With 3-State Outputs Logic Products Product Specification FEATURES • 8-bit transparent latch — '373 • 8-bit positive, edge-triggered


    OCR Scan     		PDF C006830S 1N916, 1N3064, 500ns 74L5373 74L5374 74LS373 PIN CONFIGURATION AND SPECIFICATIONS 74LS374 pin configuration 74LS374 74LS373 74LS373 pin configuration 74S373 745373 74S374

    LOGIC OF 74LS373

    Abstract: 74LS373 PIN CONFIGURATION AND SPECIFICATIONS LS 373 74LS374 pin configuration 74LS374 function latch 74ls 373
    Text: 74LS373, 74LS374, S373, S374 Signetics Logic Products I Latches/Flip-Flops FEATURES • 8-bit transparent latch — '373 • 8-blt positive, edge-triggered register — '374 • 3-State output buffers • Common 3-State Output Enable • Independent register and 3-State


    OCR Scan     		PDF 74S374 74LS373, 74LS374, 74LS373 105mA 116mA 74S373 74LS374 500ns LOGIC OF 74LS373 74LS373 PIN CONFIGURATION AND SPECIFICATIONS LS 373 74LS374 pin configuration 74LS374 function latch 74ls 373

    74LS373 PIN CONFIGURATION AND SPECIFICATIONS

    Abstract: 74LS374 pin configuration 74LS374 74LS373 74ls373 LOGIC OF 74LS373 74LS373 pin configuration 74L5374 pin configuration 74LS373 74L5373 74LS373 40 pin 74LS374
    Text: 74LS373, 74LS374, S373, S3 74 Signetics Latches/Flip-Flops '373 Octal Transparent Latch With 3-State Outputs '374 Octal D Flip-Flop With 3-State Outputs Product Specification Logic Products FEATURES T Y P IC A L P R O P A G A TIO N D E LAY TYPE • 8-bit transparent latch — '373


    OCR Scan     		PDF 74LS373, 74LS374, 74LS373 74S373 105mA 74LS374 1N916, 1N3064, 500ns 74LS373 PIN CONFIGURATION AND SPECIFICATIONS 74LS374 pin configuration 74LS374 74LS373 74ls373 LOGIC OF 74LS373 74LS373 pin configuration 74L5374 pin configuration 74LS373 74L5373 74LS373 40 pin

    74LS374N

    Abstract: 74LS373N pin diagram of IC 74LS373 74ls373 buffer ic LD02S 74LS373 PIN CONFIGURATION AND SPECIFICATIONS 74LS374D 74s373n 74LS374 74LS373 74ls373 74S374N
    Text: Signetics 74LS373, 74LS374, S373, S374 Latches/Flip-Flops '373 Octal Transparent Latch With 3-State Outputs '374 Octal D Flip-Flop With 3-State Outputs Product Specification Logic Products FEATURES TY P IC A L PR O P A G A TIO N D E LA Y T Y P IC A L SU PP LY C U R R E N T


    OCR Scan     		PDF 74LS373, 74LS374, 500ns 500ns 1N916, 1N3064, 74LS374N 74LS373N pin diagram of IC 74LS373 74ls373 buffer ic LD02S 74LS373 PIN CONFIGURATION AND SPECIFICATIONS 74LS374D 74s373n 74LS374 74LS373 74ls373 74S374N

    74LS373PC

    Abstract: 74LS373P e10s LOGIC DESCRIPTION OF 74LS373 LS 373 74LS373DC 54LS373DM 54LS373FM 74LS373FC 74LS373D
    Text: 373 CONNECTIO N DIAGRAM PINOUT A / 54LS/74LS373 OCTAL TRANSPARENT LATCH W ith 3-S tate Outputs OE [7 Ü3 Vcc Oo U ï ï) 1 0 7 Do [ 2 jÜ D ? Di [7 13 De 01 [T ïi)0 6 02 (T 1 5 ] 05 Ds [ 7 ï ï d 3 [T 13] d » o 3 |T T U 04 G ND ¡10 DESCRIPTION — The ’373 consists o f eight latches w ith 3-state outputs for


    OCR Scan     		PDF 54LS/74LS373 74LS373PC 74LS373DC 74LS373FC 54/74LS 74LS373PC 74LS373P e10s LOGIC DESCRIPTION OF 74LS373 LS 373 74LS373DC 54LS373DM 54LS373FM 74LS373FC 74LS373D

    74LS373PC

    Abstract: No abstract text available
    Text: 373 CO NNECTIO N DIAGRAM PINOUT A V54LS/74LS373 o il / ^ OCTAL TRANSPARENT LATCH With 3-State Outputs DESCRIPTION — The ’373 consists o f eight latches w ith 3-state outputs for bus organized system applications. The flip -flop s appear transparent to the


    OCR Scan     		PDF V54LS/74LS373 54/74LS 74LS373PC

    IC 74ls373

    Abstract: 74LS373 74LS533 74LS373 40 pin SN74LS373N AM25LS533DC 74LS53 Ls373 pin diagram of IC 74LS373 sn54ls373j
    Text: Am25LS373 • Am54LS/74LS373 Am25LS533 • Am54LS/74LS533 Octal Latches with Three-State Outputs DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • 8 latches in a single package • Non-inverting 'LS373, inverting LS533 • Three-state outputs interlace directly with bus organized


    OCR Scan     		PDF Am25LS373 Am54LS/74LS373 Am25LS533 Am54LS/74LS533 LS373, LS533 Am25LS Am54LS/74LS MIL-STD-883 Am25LS/54LS/74LS373 IC 74ls373 74LS373 74LS533 74LS373 40 pin SN74LS373N AM25LS533DC 74LS53 Ls373 pin diagram of IC 74LS373 sn54ls373j

    1N3064

    Abstract: 1N916 74LS 74LS377 N74LS377D N74LS377N
    Text: 74LS377 Signefics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops


    OCR Scan     		PDF 74LS377 20-pin 1N916, 1N3064, 500ns 1N3064 1N916 74LS N74LS377D N74LS377N

    pin diagram of 74LS

    Abstract: 74LS 04 N 1N3064 1N916 74LS 74LS377 N74LS377D N74LS377N LSM9
    Text: 74LS377 Signetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops


    OCR Scan     		PDF 74LS377 20-pin 1N916, 1N3064, 500ns pin diagram of 74LS 74LS 04 N 1N3064 1N916 74LS 74LS377 N74LS377D N74LS377N LSM9

    IC 74LS273

    Abstract: 74ls273 IC 74LS273 P pin diagram of 74ls273
    Text: 74LS273, S273 Signetìcs Flip-Flops Octal D Flip-Flops Product Specification Logic Products FEATURES • Ideal buffer for MOS microprocessor or memory • Eight edge-triggered D flip-flops • High speed Schottky version available • Buffered common clock


    OCR Scan     		PDF 74LS273, 20-pin 74LS273 74S273 40MHz 95MHz 109mA SQL-20 1N916, 1N3064, IC 74LS273 IC 74LS273 P pin diagram of 74ls273

    74LS273

    Abstract: No abstract text available
    Text: Sjgnetìcs 74LS273, S273 Flip-Flops Octal D Flip-Flops Product Specification Logic Products FEATURES TYPE • Ideal buffer for MOS microprocessor or memory • Eight edge-triggered D flip-flops • High speed Schottky version available • Buffered common clock


    OCR Scan     		PDF 74LS273, 20-pin 74LS273 74S273 40MHz 95MHz 109mA 1N916, 1N3064, 500ns

    Untitled

    Abstract: No abstract text available
    Text: 74LS377 S ignetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops


    OCR Scan     		PDF 74LS377 20-pin 40MHz SQL-20 500ns 500ns

    Untitled

    Abstract: No abstract text available
    Text: 74LS377 Signetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops


    OCR Scan     		PDF 74LS377 20-pin 40MHz SQL-20 500ns 500ns

    IC 74LS273 P

    Abstract: 74LS273 74ls273 IC 74LS 74S273 N74LS273D N74LS273N N74S273D N74S273N pin diagram of 74ls273
    Text: Signetìcs 74LS273, S273 Flip-Flops Octal D Flip-Flops Product Specification Logic Products FEATURES • Ideal buffer for MOS microprocessor or memory • Eight edge-triggered D flip-flops • High speed Schottky version available TY PE T Y PICA L T Y PICA L S U P P LY C U R R E N T


    OCR Scan     		PDF 74LS273, 20-pin 1N916, 1N3064, 500ns IC 74LS273 P 74LS273 74ls273 IC 74LS 74S273 N74LS273D N74LS273N N74S273D N74S273N pin diagram of 74ls273

    Untitled

    Abstract: No abstract text available
    Text: 533 CONNECTION DIAGRAM PINOUT A ^4LS/74LS533 / / / *<£ OCTAL TRANSPARENT LATCH With 3-State Outputs DESCRIPTION — The ’533 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the


    OCR Scan     		PDF 4LS/74LS533 LS533 LS37E 74LS533PC 74LS533DG 54LS533DM 74LS533FC 54LS533FM 54/74LS

    74LS533PC

    Abstract: 74LS533FC 74LS53 54LS533DM 54LS533FM 74LS533DC LS373
    Text: 533 C O N N E C T IO N D IA G R A M P IN O U T A »4LS/74LS533 ///a? OCTAL TRANSPARENT LATCH W ith 3 -S ta te Outputs ö l [T 20] Vcc ö o [F 7S] 07 do[T ÏÜ D 7 D i |T 17] Ds öi[T Ï1J06 Ö2 U d D E S C R IP T IO N — T he ’533 co n sists of e ig h t la tch e s w ith 3 -sta te o u tp u ts fo r


    OCR Scan     		PDF 4LS/74LS533 LS533 LS373. 74LS533PC 74LS533DC 54LS533DM 74LS533FC 54LS533FM 54/74LS 74LS533PC 74LS53 LS373

    74ls gate symbols

    Abstract: No abstract text available
    Text: 8-B it Latches, 8-B it Registers S N 5 4 /7 4 L S 3 7 3 S N 5 4 /7 4 L S 3 7 4 S N 5 4 /7 4 S 3 7 3 S N 5 4 /7 4 S 3 7 4 Features/B enefits Ordering Inform ation • Three-state outputs drive bus lines • 20-pin SKINNYDIP saves space • 8-bit data path matches byte boundaries


    OCR Scan     		PDF 20-pin SN54LS373 SN74LS373 SN54LS374 SN74LS374 SN54S373 SN74S373 SN54S374 SN74S374 54/74S, 74ls gate symbols

    60004

    Abstract: G74SC373D 02CZ6 G74SC374D G74SC374P 02CZ 1N3064 20-PIN 74LS G74SC373P
    Text: G S ' 3 ? /<£ 1 c. 001369 G - T ^ G 74S C 373 G 74S C 374 Microcircuits C M O S , 3-State Octal D-Type Transparent Latches and Edge Triggered Flip-Flop Circuits F ea tu re s G e ne ra l D e s c rip tio n • Equivalent to 74LS series • Low power oxide isolated silicon


    OCR Scan     		PDF G74SC373 G74SC374 G74SC374 60004 G74SC373D 02CZ6 G74SC374D G74SC374P 02CZ 1N3064 20-PIN 74LS G74SC373P

    8253/8254

    Abstract: md 8243 ITT301 6168 sc 8254 AA lt 8239 signetics B197 B236 B237
    Text: Signetics Integrated C ircuits-Lo w Power Schottky T T L TYPE NO. d e s c r ip t io n STO C K NO. N74LS 260N N 74LS261N IN74LS266N Dual 5 -In p u t NO R Gate M u ltip ly Decoder Quad Exclusive NOR 5S 735A 55 7 3 6 X 5 57 37H O U T L IN E DRW G. NO. 1 2 1 M 74LS273N


    OCR Scan     		PDF N74LS260N 5735A N74LS261N 55736X N74LS266N 5S737H M74LS273N 55738F M74LS279N N74LS283N 8253/8254 md 8243 ITT301 6168 sc 8254 AA lt 8239 signetics B197 B236 B237

    74HC FAMILY

    Abstract: elmos TMD54HC373 TMD54HC374 TMD74HC373 TMD74HC374
    Text: TM D54HC 373/TM D74HC 373 3 STATE OCTAL LATCHES TM D54HC 374/TM D74HC 374 TELMOS INC. 3 STATE OCTAL D-FLIP-FLO PS • • • • • • • • CMOS INPUT COMPATIBLE 13 NS PROPAGATION DELAY TYP. 1 ^A MAX. INPUT CURRENT DRIVES 30 LS-TTL LOADS FULL PARALLEL LOAD ACCESS


    OCR Scan     		PDF TMD54HC 373/TMD74HC 374/TMD74HC 20-Pin 74HC FAMILY elmos TMD54HC373 TMD54HC374 TMD74HC373 TMD74HC374

    F4049

    Abstract: 74HCTLS 0100L HCTL
    Text: fytrox iîsi 3 7 3 February 1985 Octal D-Type Transparent Latches with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description • 8 latches in a single package The '373 consists of 8 high-speed D-type latches cou­ pled to 3-state output buffers with high drive current ca­


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: F4049 74HCTLS 0100L HCTL

    Untitled

    Abstract: No abstract text available
    Text: S eptem ber 1983 Revised February 1999 SE M CONDUCTOR TM MM74HC373 3-STATE Octal D-Type Latch General Description signals are present at th e oth e r inputs and the state of the storage elem ents. The M M 74H C 373 high speed octal D -type latches utilize


    OCR Scan     		PDF MM74HC373

    74HC373N

    Abstract: 74H 14 373SJ 74hc373w
    Text: S eptem ber 1983 Revised February 1999 SEMICONDUCTOR TM MM74HC373 3-STATE Octal D-Type Latch General Description signals are present at th e oth e r inputs and the state of the storage elem ents. The M M 74H C 373 high speed octal D-type latches utilize advanced silicon-gate C M OS technology. They possess


    OCR Scan     		PDF MM74HC373 74HC373N 74H 14 373SJ 74hc373w