KM48S8030BT
Abstract: No abstract text available
Text: KM48S8030B CMOS SDRAM Revision History Revision .3 November 1997 - tRDL has changed 10ns to 12ns. - Binning -10 does not meet PC100 characteristics . So AC parameter/Characteristics have changed to 64M 2nd values. Revision .4 (February 1998) - Input leakage Currents (Inputs / DQ) are changed.
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KM48S8030B
PC100
KM48S8030BT
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KM48S8030BT
Abstract: No abstract text available
Text: KM48S8030B CMOS SDRAM Revision History Revision .3 November 1997 - tRDL has changed 10ns to 12ns. - Binning -10 does not meet PC100 characteristics . So AC parameter/Characteristics have changed to 64M 2nd values. Revision .4 (February 1998) - Input leakage Currents (Inputs / DQ) are changed.
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KM48S8030B
PC100
A10/AP
KM48S8030BT
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PDF
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Untitled
Abstract: No abstract text available
Text: KMM374S1623BT PC100 SDRAM MODULE Revision History Revision .0 February 1998 - Input leakage Currents (Inputs / DQ) of Component level are changed. I IL(Inputs) : ± 5uA to ± 1uA, I IL(DQ) : ± 5uA to ± 1.5uA. - Cin to be measured at V DD = 3.3V, T A = 23°C, f = 1MHz, V REF =1.4V ± 200 mV.
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KMM374S1623BT
PC100
118DIA
000DIA
150Max
81Max)
010Max
KM48S8030BT
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PDF
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Untitled
Abstract: No abstract text available
Text: SDRAM MODULE Preliminary KMM377S823BT1 Revision History Revision 3 May 1998 - CLK Input Cap. is added by PLL Input Cap. (24pF) Revision 4 (July 1998) - "REGE" description is changed. Revision 5 (Aug. 1998) - Package Dimension changed. REV. 5 Aug. 1998 Preliminary
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KMM377S823BT1
KMM377S823BT1
8Mx72
400mil
18-bits
100MHz
100MHz
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PDF
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KM48S8030
Abstract: KMM350S823BT1-GL
Text: SDRAM MODULE Preliminary KMM350S823BT1 Revision History Revision 3 July 1998 - "REGE" description is changed. Revision 4 ( Aug. 1998) - Package Dimension changed REV. 4 Aug. 1998 Preliminary KMM350S823BT1 SDRAM MODULE KMM350S823BT1 SDRAM DIMM (Intel 1.0 ver. Base)
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KMM350S823BT1
KMM350S823BT1
8Mx72
400mil
18-bits
168p1h
100MHz
KM48S8030
KMM350S823BT1-GL
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PDF
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KM48S8030BT-G10
Abstract: KM48S8030BT KM48S8030BT-G
Text: KMM374S823BTL PC66 SDRAM MODULE Revision History Revision .3 Mar. 1998 •Some Parameter values & Characteristics of comp. level are changed as below : - Input leakage currents (Inputs) : ±5uA to ±1uA. - Input leakage currents (I/O) : ±5uA to ±1.5uA.
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KMM374S823BTL
200mV.
66MHz
KM48S8030BT-G10
KM48S8030BT
KM48S8030BT-G
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KMM375S1723T-G0
Abstract: KMM375S1723T-G8 KMM375S1723T-GH KMM375S1723T-GL
Text: Preliminary KMM375S1723T SDRAM MODULE KMM375S1723T SDRAM DIMM 16Mx72 SDRAM DIMM with PLL & Register based on 16Mx8, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM375S1723T is a 16M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung KMM375S1723T consists of nine CMOS 16Mx8 bit
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KMM375S1723T
KMM375S1723T
16Mx72
16Mx8,
16Mx8
400mil
18-bits
24-pin
KMM375S1723T-G0
KMM375S1723T-G8
KMM375S1723T-GH
KMM375S1723T-GL
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PDF
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KMM377S823CT1-G8
Abstract: KMM377S823CT1-GH KMM377S823CT1-GL
Text: Preliminary KMM377S823CT1 SDRAM MODULE KMM377S823CT1 SDRAM DIMM Intel 1.0 ver. Base 8Mx72 SDRAM DIMM with PLL & Register based on 8Mx8, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S823CT1 is a 8M bit x 72 Synchronous
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KMM377S823CT1
KMM377S823CT1
8Mx72
400mil
18-bits
168pin
0022uF
KMM377S823CT1-G8
KMM377S823CT1-GH
KMM377S823CT1-GL
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PDF
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KMM375S823CT-G0
Abstract: KMM375S823CT-G8 KMM375S823CT-GH KMM375S823CT-GL
Text: Preliminary KMM375S823CT SDRAM MODULE KMM375S823CT SDRAM DIMM 8Mx72 SDRAM DIMM with PLL & Register based on 8Mx8, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM375S823CT is a 8M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung
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KMM375S823CT
KMM375S823CT
8Mx72
400mil
18-bits
24-pin
168-pin
KMM375S823CT-G0
KMM375S823CT-G8
KMM375S823CT-GH
KMM375S823CT-GL
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Untitled
Abstract: No abstract text available
Text: Preliminary PC66 SDRAM MODULE KMM374S1623CTL KMM374S1623CTL SDRAM DIMM 16Mx72 SDRAM DIMM with ECC based on 8Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM374S1623CTL is a 16M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung
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KMM374S1623CTL
KMM374S1623CTL
16Mx72
400mil
168-pin
KM48S8030BT
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PDF
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KM48S8030BT-GL
Abstract: nn5264805tt-b60 KM48S2020CT-GL 0364804CT3B-260 d4564163g5 nt56v1680a0t D4564841g5 81F641642B-103FN M5M4V16S30DTP Siemens 9832
Text: PC100 SDRAM Component Testing Summary As part of Intel’s enabling process, the following test/characterization procedure has been implemented on PC100 SDRAM components. A small sample of components 2-5 devices have been tested under the conditions described in Table 2.
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PC100
KM48S8030BT-GL
nn5264805tt-b60
KM48S2020CT-GL
0364804CT3B-260
d4564163g5
nt56v1680a0t
D4564841g5
81F641642B-103FN
M5M4V16S30DTP
Siemens 9832
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PDF
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KMM374S823BT-GL
Abstract: KMM374S823BT-G8 KMM374S823BT-GH KM48S8030BT-G MV 42H
Text: KMM374S823BT PC100 SDRAM MODULE Revision History Revision .0 February 1998 - Input leakage Currents (Inputs / DQ) of Component level are changed. IIL(Inputs) : ± 5uA to ± 1uA, IIL(DQ) : ± 5uA to ± 1.5uA. - Cin to be measured at VDD = 3.3V, TA = 23°C, f = 1MHz, VREF =1.4V ± 200 mV.
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Original
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KMM374S823BT
PC100
100MHz
100MHz
KMM374S823BT-GL
KMM374S823BT-G8
KMM374S823BT-GH
KM48S8030BT-G
MV 42H
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PDF
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KM48S8030BT
Abstract: No abstract text available
Text: KM48S8030B CMOS SDRAM 2M x 8Bit x 4 Banks Synchronous DRAM FEATURES GENERAL DESCRIPTION • • • • The KM48S8030B is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 8 bits, fabricated with SAMSUNG'S high performance CMOS technol
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OCR Scan
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KM48S8030B
KM48S8030B
KM48S8030BT
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PDF
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Untitled
Abstract: No abstract text available
Text: KM48S8030B CMOS SDRAM Revision History Revision .3 N ovem ber 1997 - tRDL has changed 10ns to 12ns. - Binning -10 does not m eet PC100 characteristics . So AC param eter/C haracteristics have changed to 64M 2nd values. Revision .4 (February 1998) - Input leakage C urrents (Inputs / DQ) are changed.
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OCR Scan
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KM48S8030B
PC100
10/AP
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PDF
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Untitled
Abstract: No abstract text available
Text: PC66 SDRAM MODULE KMM374S1623BTL Revision History Revision .3 March 1998 Som e Param eter value s & C haracteristics of com p, level are changed as below : - Input leakage currents (Inputs) : ± 5 u A to ±1uA. - Input leakage currents (I/O) : ± 5 u A to ± 1 ,5uA.
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OCR Scan
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KMM374S1623BTL
KM48S8030BT
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PDF
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Untitled
Abstract: No abstract text available
Text: KMM374S1 623BT PC100 SDR AM M O D U L E Re vis ion Hist ory Revision .0 February 1998 -Input leakage Currents (Inputs / DQ) of Component level are changed. llL(lnputs) : ± 5uA to ± 1uA, llL(DQ) : ± 5uA to ± 1.5uA. -C in to be measured at V DD = 3.3V, T a = 23°C, f = 1MHz, V
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OCR Scan
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KMM374S1
623BT
PC100
KMM374S1
150Max
KM48S8030BT
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PDF
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Untitled
Abstract: No abstract text available
Text: KMM366S823BTL PC66 SDRAM MODULE KMM366S823BTL SDRAM DIMM 8Mx64 SDRAM DIMM based on 8Mx8,4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM366S823BTL is a 8M bit x 64 Synchronous Dynamic RAM high density memory module. The Samsung
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OCR Scan
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KMM366S823BTL
KMM366S823BTL
8Mx64
400mil
168-pin
KMM366S8238TL
000DIA±
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PDF
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Untitled
Abstract: No abstract text available
Text: 144pin SDRAM SODIMM KMM466S823BT3 KMM466S823BT3 SDRAM SODIMM 8Mx64 SDRAM SODIMM based on 8Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM466S823BT3 is a 8M bit x 64 Synchronous • Performance range Dynamic RAM high density memory module. The Samsung
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OCR Scan
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144pin
KMM466S823BT3
KMM466S823BT3
8Mx64
400mil
144-pin
M466S823BT3-
100MHz
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PDF
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KMM374S1623BTL
Abstract: KMM374S1623BTL-G0
Text: KMM374S1623BTL PC66 SDRAM MODULE KMM374S1623BTL SDRAM DIMM 16Mx72 SDRAM DIMM with ECC based on 8Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM374S1623BTL is a 16M bit x 72 Synchro nous Dynamic RAM high density memory module. The Samsung
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OCR Scan
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KMM374S1623BTL
KMM374S1623BTL
16Mx72
400mil
168-pin
KMM374S1B23BTL
KMM374S1623BTL-G0
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PDF
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Untitled
Abstract: No abstract text available
Text: PC100 SDRAM MODULE KMM366S1623BT Revision History Revision .0 February 1998 - Input leakage Currents (Inputs / DQ) of Com ponent level are changed. In(lnputs) : ± 5uA to ± 1 u A , - Cin to be measured at V dd I il (DQ) : ± 5uA to ± 1.5uA. = 3.3V, T a = 23°C, f = 1 MHz, V
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OCR Scan
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KMM366S1623BT
PC100
KM48S8030BT
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PDF
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Untitled
Abstract: No abstract text available
Text: SDRAM MODULE Preliminary KMM377S823BT1 Revision History Revision 3 May 1998 - CLK input Cap. is added by PLL Input Cap. (24pF) Revision 4 (July 1998) - "REGE" description is changed. REV. 4 July 1998 ELECTRG&HCS Preliminary KMM377S823BT1 SDRAM MODULE KMM377S823BT1 SDRAM DIMM (Intel 1.0 ver. Base)
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OCR Scan
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KMM377S823BT1
KMM377S823BT1
400mil
18-bits
KM48S8030BT
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PDF
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Untitled
Abstract: No abstract text available
Text: KMM366S1623BT PC100 SDR AM M O D U L E Re vis ion Hist ory Revision .0 February 1998 -Input leakage Currents (Inputs / DQ) of Component level are changed. llL(lnputs) : ± 5uA to ± 1uA, llL(DQ) : ± 5uA to ± 1.5uA. -C in to be measured at V DD = 3.3V, T a = 23°C, f = 1MHz, V
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OCR Scan
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KMM366S1623BT
PC100
KMM366S162top
150Max
KM48S8030BT
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PDF
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KMM366S1623BT-GL
Abstract: No abstract text available
Text: KMM366S1623BT PC100 SDRAM MODULE KMM366S1623BT SDRAM DIMM 16Mx64 SDRAM DIMM based on 8Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM366S1623BT is a 16M bit x 64 Synchronous Dynamic RAM high density memory module. The Samsung
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OCR Scan
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KMM366S1623BT
KMM366S1623BT
PC100
16Mx64
400mil
168-pin
KMM366S1623BT-GL
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PDF
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Untitled
Abstract: No abstract text available
Text: KM M 4 6 6 S 8 2 3 B T 2 144pm S D R A M S O D IM M Revision History R evision .2 M arch 1998 • Some Parameter values & Chracteristics of comp, level are changed as below : -In p u t leakage Currents (Inputs) : ± 5uA to ± 1uA. Input leakage Currents (I/O) : ± 5uA to ± 1.5uA.
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OCR Scan
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144pm
44pin
KM48S8030BT
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PDF
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