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    JEDEC HAST Search Results

    JEDEC HAST Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TMP139AIYAHR Texas Instruments JEDEC DDR5 temperature sensor with 0.5 °C accuracy 6-DSBGA -40 to 125 Visit Texas Instruments Buy
    SN74SSQEA32882ZALR Texas Instruments JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA 0 to 85 Visit Texas Instruments Buy
    SN74SSQE32882ZALR Texas Instruments JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA 0 to 85 Visit Texas Instruments
    SN74SSQEB32882ZALR Texas Instruments JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA 0 to 85 Visit Texas Instruments Buy
    SN74SSQEC32882ZALR Texas Instruments JEDEC SSTE32882 Compliant Low Power 28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA 0 to 85 Visit Texas Instruments Buy

    JEDEC HAST Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    AEC-Q100-004

    Abstract: JESD22-A113 HDJD-J822
    Text: HDJD-J822 Color Management System Feedback Controller Data Sheet Description Failure Rate Prediction The following cumulative test results have been obtained from testing performed at Avago Technologies in accordance with the latest revision of JEDEC. Avago


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    PDF HDJD-J822 AEC-Q100-004 /-100mA) JESD22-A113-A 5989-4106EN AEC-Q100-004 JESD22-A113 HDJD-J822

    jesd 51-7

    Abstract: 63 ball Vfbga thermal resistance 56DL metcal apr 5000 MO-205 56ZQL BGA Ball Crack 054UG08C127 APR-5000
    Text: Application Report SZZA040 - December 2003 54BGA Package Frank Mortan SLL Package Development ABSTRACT The TI 54-ball low-profile, fine-pitch, ball grid array TFBGA meets dimensions specified in JEDEC MO-205, Variation DD. This 0.8-mm-pitch BGA allows economical OEM designs


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    PDF SZZA040 54BGA 54-ball MO-205, 16-bit jesd 51-7 63 ball Vfbga thermal resistance 56DL metcal apr 5000 MO-205 56ZQL BGA Ball Crack 054UG08C127 APR-5000

    Untitled

    Abstract: No abstract text available
    Text: THS1408-EP 14-BIT, 3/8 MSPS DSP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PGA SGLS129B − JULY 2002 − REVISED FEBRUARY 2010 Features D Controlled Baseline D D D D D D D Component qualification in accordance with JEDEC and industry


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    PDF THS1408-EP 14-BIT, SGLS129B

    Untitled

    Abstract: No abstract text available
    Text: THS1408-EP 14-BIT, 3/8 MSPS DSP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PGA SGLS129B − JULY 2002 − REVISED FEBRUARY 2010 Features D Controlled Baseline D D D D D D D Component qualification in accordance with JEDEC and industry


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    PDF THS1408-EP 14-BIT, SGLS129B 14-Bit TMS320C6000

    Untitled

    Abstract: No abstract text available
    Text: THS1408-EP 14-BIT, 3/8 MSPS DSP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PGA SGLS129B − JULY 2002 − REVISED FEBRUARY 2010 Features D Controlled Baseline D D D D D D D Component qualification in accordance with JEDEC and industry


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    PDF THS1408-EP 14-BIT, SGLS129B

    Untitled

    Abstract: No abstract text available
    Text: THS1408-EP 14-BIT, 3/8 MSPS DSP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PGA SGLS129B − JULY 2002 − REVISED FEBRUARY 2010 Features D Controlled Baseline D D D D D D D Component qualification in accordance with JEDEC and industry


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    PDF THS1408-EP 14-BIT, SGLS129B 14-Bit TMS320C6000

    LV 1084 73

    Abstract: LV 373A BGA PACKAGE thermal profile LV 1084 land pattern for tvSOP 90 ball VFBGA micro pitch BGA VA244 VFBGA LVTH2245
    Text: Application Report SZZA028A - November 2001 8-Bit Linear and Logic Families in 20-Ball, 0.65-mm Pitch, Very-Thin, Fine-Pitch BGA VFBGA Packages Frank Mortan and Mark Frimann Standard Linear & Logic ABSTRACT Texas Instruments 20-ball MicroStar Jr. package is a standardized JEDEC VFBGA


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    PDF SZZA028A 20-Ball, 65-mm 20-ball LV 1084 73 LV 373A BGA PACKAGE thermal profile LV 1084 land pattern for tvSOP 90 ball VFBGA micro pitch BGA VA244 VFBGA LVTH2245

    56QN50T18080

    Abstract: Senju MO-220-compliant Theta JA of 64-pin BGA 56RGQ senju solder paste MO-220 SN74SSTV16859 IPC-9701 qfn jc jb
    Text: Application Report SCEA032 - March 2003 56-Pin Quad Flatpack No-Lead Logic Package Frank Mortan and Lance Wright SLL Package Development ABSTRACT Texas Instruments TI Quad Flatpack No-Lead (QFN) 56-terminal package complies with JEDEC standard MO-220, allows for board miniaturization, and holds several advantages


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    PDF SCEA032 56-Pin 56-terminal MO-220, 56QN50T18080 Senju MO-220-compliant Theta JA of 64-pin BGA 56RGQ senju solder paste MO-220 SN74SSTV16859 IPC-9701 qfn jc jb

    48 ball VFBGA

    Abstract: 90 ball VFBGA LVTH162 micro pitch BGA tSSOP 56 socket TSSOP YAMAICHI SOCKET 48-PIN 56-PIN ALVCH16373 LVCH16244A
    Text: Application Report SZZA029B - May 2002 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch, Very Thin Fine-Pitch BGA VFBGA Packages Frank Mortan and Mark Frimann Standard Linear & Logic ABSTRACT TI’s 56-ball MicroStar Jr. package, registered under JEDEC MO-225, has demonstrated


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    PDF SZZA029B 16-Bit 56-Ball, 65-mm 56-ball MO-225, 48-pin 56-pin 48 ball VFBGA 90 ball VFBGA LVTH162 micro pitch BGA tSSOP 56 socket TSSOP YAMAICHI SOCKET ALVCH16373 LVCH16244A

    Untitled

    Abstract: No abstract text available
    Text: TL16C752B-EP www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 3.3 V DUAL UART WITH 64-BYTE FIFO Check for Samples: TL16C752B-EP FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and


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    PDF TL16C752B-EP SGLS153B 64-BYTE ST16C2550 24-MHz 48-MHz

    Untitled

    Abstract: No abstract text available
    Text: TL16C752B-EP www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 3.3 V DUAL UART WITH 64-BYTE FIFO Check for Samples: TL16C752B-EP FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and


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    PDF TL16C752B-EP SGLS153B 64-BYTE

    TLV3701-EP

    Abstract: TLV3701 TLV3701-Q1 TLV3701QDBVREP
    Text: TLV3701ĆEP SGLS170 − JUNE 2003 NANOPOWER PUSHĆPULL OUTPUT COMPARATOR FEATURES D Controlled Baseline D D D D D D D D D D † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly


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    PDF TLV3701EP SGLS170 TLV3701-EP TLV3701 TLV3701-Q1 TLV3701QDBVREP

    lathes

    Abstract: ST16C2550 TL16C752B TL16C752B-EP TL16C752BLPTREP TL16C752BTPTREP MCR-3
    Text: TL16C752B-EP 3.3 V DUAL UART WITH 64-BYTE FIFO www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an


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    PDF TL16C752B-EP 64-BYTE SGLS153B lathes ST16C2550 TL16C752B TL16C752B-EP TL16C752BLPTREP TL16C752BTPTREP MCR-3

    TLV3701-EP

    Abstract: No abstract text available
    Text: TLV3701ĆEP SGLS170 − JUNE 2003 NANOPOWER PUSHĆPULL OUTPUT COMPARATOR FEATURES D Controlled Baseline D D D D D D D D D D † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly


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    PDF TLV3701EP SGLS170 OT-23 SLOU060 TLV3701-EP

    SLOU060

    Abstract: TLV3701-EP
    Text: TLV3701-EP SGLS170 – JUNE 2003 NANOPOWER PUSH-PULL OUTPUT COMPARATOR FEATURES D Controlled Baseline D D D D D D D D D D † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly


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    PDF TLV3701-EP SGLS170 OT-23 SLOU060 100ved. TLV3701-EP

    TLV3701-EP

    Abstract: No abstract text available
    Text: TLV3701-EP SGLS170 – JUNE 2003 NANOPOWER PUSH-PULL OUTPUT COMPARATOR FEATURES D Controlled Baseline D D D D D D D D D D † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly


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    PDF TLV3701-EP SGLS170 OT-23 SLOU060 TLV3701-EP

    TLV3701-EP

    Abstract: No abstract text available
    Text: TLV3701ĆEP SGLS170 − JUNE 2003 NANOPOWER PUSHĆPULL OUTPUT COMPARATOR FEATURES D Controlled Baseline D D D D D D D D D D † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly


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    PDF TLV3701Ä SGLS170 TLV3701-EP

    RX2 pin DIAGRAM

    Abstract: No abstract text available
    Text: TL16C752B-EP 3.3-V DUAL UART WITH 64-BYTE FIFO www.ti.com SGLS153A – FEBRUARY 2003 – REVISED MARCH 2007 FEATURES • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an


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    PDF TL16C752B-EP 64-BYTE SGLS153A ST16C2550 24-MHz 48-MHz RX2 pin DIAGRAM

    TLV3701-EP

    Abstract: No abstract text available
    Text: TLV3701-EP SGLS170 – JUNE 2003 NANOPOWER PUSH-PULL OUTPUT COMPARATOR FEATURES D Controlled Baseline D D D D D D D D D D † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly


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    PDF TLV3701-EP SGLS170 OT-23 SLOU060 100ments TLV3701-EP

    Untitled

    Abstract: No abstract text available
    Text: TL16C752B-EP 3.3 V DUAL UART WITH 64-BYTE FIFO www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an


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    PDF TL16C752B-EP 64-BYTE SGLS153B ST16C2550 24-MHz 48-MHz

    TLV3701-EP

    Abstract: No abstract text available
    Text: TLV3701-EP SGLS170 – JUNE 2003 NANOPOWER PUSH-PULL OUTPUT COMPARATOR FEATURES D Controlled Baseline D D D D D D D D D D † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly


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    PDF TLV3701-EP SGLS170 OT-23 SLOU060 TLV3701-EP

    KM23V32205

    Abstract: No abstract text available
    Text: Preliminary Synch. MROM KM23SV32205T 1M x32 Synchronous MASKROM FEATURES GENERAL DESCRIPTION • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Switchable organization 2,097,152 x 16 word mode / 1,048,576 x 32(double word mode)


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    PDF KM23SV32205T 33MHz 50MHz 66MHz 86TSOP2 KM23SV32205T KM23V32205

    Untitled

    Abstract: No abstract text available
    Text: CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3 V RAM Direct interface with the processor and external cache controller Asynchronous output enable JEDEC-standard pinout 52-pin PLCC and PQFP packaging Features • Supports 66-MHz Pentium proces­


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    PDF CY7C1331 CY7C1332 66-MHz 7C1331) 7C1332) 52-pin

    hh 004 f

    Abstract: 2SA1194
    Text: HITACHI 2SA1194 SILICO N PNP EP ITAXIAL 1 1 ¡S o 12 HIGH GAIN AM PLIFIER 1. Em itter 2. C o li m a r V Hast D im ensions in m m (JEDEC TO-126 MOD.) M AXIM UM C O LLEC TO R DISSIPATION CURVE ABSO LU TE M AXIM UM RATING S (Ta=25°C) Item Symbol 2 S A I19 4 ®


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    PDF 2SA1194Â O-126 2SAI194Â -500mA hh 004 f 2SA1194