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    DIODE PB7D Search Results

    DIODE PB7D Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CUZ24V Toshiba Electronic Devices & Storage Corporation Zener Diode, 24 V, USC Visit Toshiba Electronic Devices & Storage Corporation
    XCUZ13V Toshiba Electronic Devices & Storage Corporation Zener Diode, 13.0 V, USC Visit Toshiba Electronic Devices & Storage Corporation
    XCUZ36V Toshiba Electronic Devices & Storage Corporation Zener Diode, 36.0 V, USC Visit Toshiba Electronic Devices & Storage Corporation
    CUZ12V Toshiba Electronic Devices & Storage Corporation Zener Diode, 12 V, USC Visit Toshiba Electronic Devices & Storage Corporation
    MUZ5V6 Toshiba Electronic Devices & Storage Corporation Zener Diode, 5.6 V, USM Visit Toshiba Electronic Devices & Storage Corporation

    DIODE PB7D Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    OR3LP26B

    Abstract: OR3T20 ORT8850 7ba2 diode pb7d
    Text: Preliminary Data Sheet April 2001 PayloadPlus /APC UTOPIA Slave Bridge Introduction Features The PayloadPlus/ATM port controller APC universal test and operations PHY interface for ATM (UTOPIA) slave bridge, also known as the PayloadPlus APC wedge (PAW) or the Atlanta™ interface


    Original     		PDF OR3T20 DS01-212NCIP OR3LP26B ORT8850 7ba2 diode pb7d

    pt45

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet DS1004 Version 01.2, June 2006 LatticeSC Family Data Sheet Introduction June 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 110mW VCC12. LFSC25 900-Ball pt45

    LCMX0640

    Abstract: J-STD-012 LCMXO256C 3TN144C LATTICE 15 pin through hole d sub connector lcmx064
    Text: MachXO Family Handbook Version 01.0, July 2005 MachXO Family Handbook Table of Contents July 2005 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF 1-800-LATTICE LCMX0640 J-STD-012 LCMXO256C 3TN144C LATTICE 15 pin through hole d sub connector lcmx064

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet DS1004 Version 01.3, August 2006 LatticeSC Family Data Sheet Introduction August 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 110mW

    2.5V RELAY

    Abstract: relay coil 270r PASB SMT-1210 108505686 J119 pDS4102-DL2 J117 al15 schematic J122 transistor
    Text: High-Speed SERDES Briefcase Board Evaluation Board for ORSO/ORT82G5, ispGDX2 and ispPAC Devices User’s Guide March 2007 Revision: EB01_01.1 Lattice Semiconductor High-Speed SERDES Briefcase Board User’s Guide Introduction This user’s guide describes the Lattice High-Speed SERDES Briefcase Board, a stand-alone evaluation board for


    Original     		PDF ORSO/ORT82G5, ORSO82G5 ORT82G5 ispGDX2-256 ispPAC-POWR1208. ulS09, SA054A00- P3828119 2.5V RELAY relay coil 270r PASB SMT-1210 108505686 J119 pDS4102-DL2 J117 al15 schematic J122 transistor

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet DS1004 Version 01.4b, February 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW SC115

    PB68C

    Abstract: LFSCM3GA40EP1
    Text: LatticeSC Family Data Sheet DS1004 Version 01.4a, January 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW LVPECL33 SC115 PB68C LFSCM3GA40EP1

    BGA 927

    Abstract: No abstract text available
    Text: MachXO Family Handbook HB1002 Version 01.9, February 2007 MachXO Family Handbook Table of Contents February 2007 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1089 TN1092 BGA 927

    LCMXO1200C-3FTN256I

    Abstract: No abstract text available
    Text: MachXO Family Handbook HB1002 Version 01.4, June 2006 MachXO Family Handbook Table of Contents June 2006 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1008 TN1074 TN1086 LCMXO1200C-3FTN256I

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Handbook Version 01.3, November 2005 MachXO Family Handbook Table of Contents November 2005 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF 1-800-LATTICE

    LCMXO640C-3TN100C

    Abstract: LCMXO1200 LCMXO2280 LCMXO256 LCMXO640 LVCMOS15 LVCMOS25 LVCMOS33 ISPVM embedded LCMXO1200C-3FTN256C
    Text: MachXO Family Handbook HB1002 Version 01.6, September 2006 MachXO Family Handbook Table of Contents September 2006 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1086 TN1074 LCMXO640C-3TN100C LCMXO1200 LCMXO2280 LCMXO256 LCMXO640 LVCMOS15 LVCMOS25 LVCMOS33 ISPVM embedded LCMXO1200C-3FTN256C

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Handbook HB1002 Version 01.4, June 2006 MachXO Family Handbook Table of Contents June 2006 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1008 TN1074 TN1086

    Using Hierarchy in VHDL Design

    Abstract: No abstract text available
    Text: MachXO Family Handbook HB1002 Version 01.8, December 2006 MachXO Family Handbook Table of Contents December 2006 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1074 TN1089 TN1092 Using Hierarchy in VHDL Design

    16X1 ram

    Abstract: No abstract text available
    Text: MachXO Family Handbook HB1002 Version 01.5, September 2006 MachXO Family Handbook Table of Contents September 2006 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1086 TN1074 16X1 ram

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW LFSC25 FF1020 LFSC80

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW LFSC25 FF1020 LFSC80

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW LFSC25 FF1020 LFSC80

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Handbook HB1002 Version 02.0, November 2007 MachXO Family Handbook Table of Contents November 2007 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1086 TN1090 TN1091 TN1092

    PCLK40

    Abstract: BGA 927
    Text: MachXO Family Handbook HB1002 Version 02.0, November 2007 MachXO Family Handbook Table of Contents November 2007 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1086 TN1090 TN1091 TN1092 PCLK40 BGA 927

    MachXO sysIO Usage Guide

    Abstract: LCMXO1200C-3TN100C LCMXO640C-3T100C LCMXO640C-4MN LCMXO1200C-3FTN256I LCMXO640C-3TN144C 50mhz oscillator MachXO-2280 FTN256 LCMXO256
    Text: MachXO Family Handbook HB1002 Version 02.1, June 2009 MachXO Family Handbook Table of Contents June 2009 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1090 TN1091 TN1092 TN1074 MachXO sysIO Usage Guide LCMXO1200C-3TN100C LCMXO640C-3T100C LCMXO640C-4MN LCMXO1200C-3FTN256I LCMXO640C-3TN144C 50mhz oscillator MachXO-2280 FTN256 LCMXO256

    "x-ray machine"

    Abstract: LCMXO640C-3TN144C TN1074 SMD MARKING CODE k11 lattice machxo lcmxo1200c LC4256ZE LCMXO2280C reflow LCMXO2280C-3FTN256I smd marking code G16 LCMXO1200
    Text: MachXO Family Handbook HB1002 Version 02.4, September 2010 MachXO Family Handbook Table of Contents September 2010 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1074 TN1089 TN1091 "x-ray machine" LCMXO640C-3TN144C SMD MARKING CODE k11 lattice machxo lcmxo1200c LC4256ZE LCMXO2280C reflow LCMXO2280C-3FTN256I smd marking code G16 LCMXO1200

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Handbook HB1002 Version 02.3, March 2010 MachXO Family Handbook Table of Contents March 2010 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1074 TN1089

    diode SMD MARKING CODE m1

    Abstract: FTBGA 411 mux verilog code for 16 bit inputs
    Text: MachXO Family Handbook HB1002 Version 02.0, November 2007 MachXO Family Handbook Table of Contents November 2007 Section I. MachXO Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1002 TN1086 TN1090 TN1091 TN1092 diode SMD MARKING CODE m1 FTBGA 411 mux verilog code for 16 bit inputs

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW