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    CHN 633 Search Results

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    CHN 550

    Abstract: CHN 545 chn 710 CHN 712 chn 538 CHN 431 CHN 709 CHN 741 chn 738 chn 648 equivalent
    Text: R&S ZNC/ZND Vector Network Analyzers User Manual ;xíÇ2 User Manual Test & Measurement 1173.9557.02 ─ 26 This manual describes the following vector network analyzer types: ● R&S®ZNC3 (2 ports, 9 kHz to 3 GHz, N connectors), order no. 1311.6004K12


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    PDF 6004K12 ZNC-B10 ZN-B14 ZNC-B19 ZNC3-B22 ZNC-K19 VXI-11 CHN 550 CHN 545 chn 710 CHN 712 chn 538 CHN 431 CHN 709 CHN 741 chn 738 chn 648 equivalent

    CHN 530

    Abstract: chn 723 chn 448 CHN 727 CS4125 CS4130 chn 711 TSMC sram1 CS4100 CS4110
    Text: CS4100 ADPCM Speech Coders Virtual Components for the Converging World The CS4100 family of adaptive differential pulse code modulators ADPCMs is designed to provide high performance solutions for a broad range of applications requiring speech compression and decompression. These


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    PDF CS4100 CS4100 DS4100-b CHN 530 chn 723 chn 448 CHN 727 CS4125 CS4130 chn 711 TSMC sram1 CS4110

    CHN b42

    Abstract: chn 743 pin of chn 743 chn 529 CHN 524 chn 729 CHN 849 CHN 616 CHN 847 RYM 17-18
    Text: ADSP-21065L SHARC DSP Technical Reference Revision 2.0, July 2003 Part Number 82-001903-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2003 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent


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    PDF ADSP-21065L I-127 I-128 16-bit CHN b42 chn 743 pin of chn 743 chn 529 CHN 524 chn 729 CHN 849 CHN 616 CHN 847 RYM 17-18

    LUPA-1300-2

    Abstract: LUPA1300-2 AN57864 AN54468 ke63 CHN 816 Color Filter Array CFA transistor CHN 64 149 transistor CHN 64 229 -20/LUPA1300-2
    Text: NOIL2SM1300A LUPA1300-2: High Speed CMOS Image Sensor Features • • • • • • • • • • • • • • • • 1280 x 1024 Active Pixels 14 mm X 14 mm Square Pixels 1.4” Optical Format Monochrome or Color Digital Output 500 fps Frame Rate


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    PDF NOIL2SM1300A LUPA1300-2: 10-Bit 168-Pin NOIL2SM1300A/D LUPA-1300-2 LUPA1300-2 AN57864 AN54468 ke63 CHN 816 Color Filter Array CFA transistor CHN 64 149 transistor CHN 64 229 -20/LUPA1300-2

    AN57864

    Abstract: LUPA-1300-2 AN54468 crc 13002 144x128 FIX32 CHN 234 diode
    Text: CYIL2SM1300AA LUPA 1300-2: High Speed CMOS Image Sensor Features • 1280 x 1024 Active Pixels ■ 14 µm X 14 µm Square Pixels FPN correction enables the sensor to output ready to use image data for most applications. To enable simple and reliable system


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    PDF CYIL2SM1300AA AN57864 LUPA-1300-2 AN54468 crc 13002 144x128 FIX32 CHN 234 diode

    AN57864

    Abstract: LUPA1300-2 LUPA-1300-2 NOIL2SM1300A-GDC CHN 816 CHN 234 diode LUPA-1300 CHN 633 -20/LUPA1300-2
    Text: NOIL2SM1300A LUPA1300-2: High Speed CMOS Image Sensor Features • • • • • • • • • • • • • • • • 1280 x 1024 Active Pixels 14 mm X 14 mm Square Pixels 1.4” Optical Format Monochrome or Color Digital Output 500 fps Frame Rate


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    PDF NOIL2SM1300A LUPA1300-2: 10-Bit 168-Pin NOIL2SM1300A/D AN57864 LUPA1300-2 LUPA-1300-2 NOIL2SM1300A-GDC CHN 816 CHN 234 diode LUPA-1300 CHN 633 -20/LUPA1300-2

    Untitled

    Abstract: No abstract text available
    Text: NOIL2SM1300A LUPA1300-2: High Speed CMOS Image Sensor Features • • • • • • • • • • • • • • • • 1280 x 1024 Active Pixels 14 mm X 14 mm Square Pixels 1.4” Optical Format Monochrome or Color Digital Output 500 fps Frame Rate


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    PDF NOIL2SM1300A LUPA1300-2: 10-Bit 168-Pin NOIL2SM1300A/D

    AN57864

    Abstract: transistor CHN 64 229
    Text: NOIL2SM1300A LUPA1300-2: High Speed CMOS Image Sensor Features • • • • • • • • • • • • • • • • 1280 x 1024 Active Pixels 14 mm X 14 mm Square Pixels 1.4” Optical Format Monochrome or Color Digital Output 500 fps Frame Rate


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    PDF NOIL2SM1300A LUPA1300-2: 10-Bit 168-Pin NOIL2SM1300A/D AN57864 transistor CHN 64 229

    AN57864

    Abstract: LUPA-1300-2 JESD625-A LUPA1300 AN54468 CHN 633 diode AN5256 LUPA-1300 CYIL2SC1300AA-GZDC CHN 633 Diodes
    Text: CYIL2SM1300AA LUPA 1300-2: High Speed CMOS Image Sensor Features • 1280 x 1024 Active Pixels ■ 14 µm X 14 µm Square Pixels FPN correction enables the sensor to output ready to use image data for most applications. To enable simple and reliable system


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    PDF CYIL2SM1300AA AN57864 LUPA-1300-2 JESD625-A LUPA1300 AN54468 CHN 633 diode AN5256 LUPA-1300 CYIL2SC1300AA-GZDC CHN 633 Diodes

    processor cross reference

    Abstract: DATASHEET OF DMA dma controller ADSP-21065 ADSP-21065L CHN 643 CHN 632 CHN 617 CHN 616 CHN 642
    Text:  '0$ Figure 6-0. Listing 6-0. Table 6-0. Table 6-0. Direct Memory Access DMA provides a mechanism for transferring an entire block of data. The processor’s on-chip DMA controller relieves the core processor of moving data between internal memory and an external data source or


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    PDF ADSP-21065L ADSP-21065L processor cross reference DATASHEET OF DMA dma controller ADSP-21065 CHN 643 CHN 632 CHN 617 CHN 616 CHN 642

    CHN 648

    Abstract: chn 542 CHN 612 diode CHN 552 CHN 628 CHN 522 CHN 632 chn 637 chn 621 CHN 631
    Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.5 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection


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    PDF XRT86L38 XRT86L38 CHN 648 chn 542 CHN 612 diode CHN 552 CHN 628 CHN 522 CHN 632 chn 637 chn 621 CHN 631

    CHN 612 diode

    Abstract: CHN 545 CHN 648 chn 542 CHN 519 ST chn 624 CHN 507 SCR PIN CONFIGURATION CHN 035 CHN 522 CHN 535
    Text: áç XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO AUGUST 2004 REV. P1.1.6 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection


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    PDF XRT86L38 XRT86L38 CHN 612 diode CHN 545 CHN 648 chn 542 CHN 519 ST chn 624 CHN 507 SCR PIN CONFIGURATION CHN 035 CHN 522 CHN 535

    HMI Software SIMATIC ProTool

    Abstract: TD200 display manual book PLC siemens S7-200 TP177B Wiring Diagram s7-200 siemens siemens simatic op17 siemens simatic op7 manual manual repair offline ups 600 va siemens simatic op7 Wiring Diagram s7-300 analog module
    Text: Automation and Drives Human Machine Interface Postfach 4848 90327 NÜRNBERG Germany w w w. s i e m e n s .c o m/ a uto ma t i o n The information provided in this catalog contains descriptions or characteristics of performance which in case of actual use do not always apply as described


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    PDF E86060-K4680-A101-B4-7600 HMI Software SIMATIC ProTool TD200 display manual book PLC siemens S7-200 TP177B Wiring Diagram s7-200 siemens siemens simatic op17 siemens simatic op7 manual manual repair offline ups 600 va siemens simatic op7 Wiring Diagram s7-300 analog module

    chn 924

    Abstract: chn 648 equivalent
    Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.3 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection


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    PDF XRT86L38 XRT86L38 TR54016, G-703, chn 924 chn 648 equivalent

    CHN G4 141

    Abstract: No abstract text available
    Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.1.0 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection


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    PDF XRT86L38 XRT86L38 CHN G4 141

    CHN G4 309

    Abstract: 40 serice free DMO 565 R CHN 932
    Text: xr XRT86L38 PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JANUARY 2005 REV. P1.1.7 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .


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    PDF XRT86L38 XRT86L38 CHN G4 309 40 serice free DMO 565 R CHN 932

    DMO 565 R

    Abstract: chn 648 equivalent CHN 507 CHN 618 CHN 552 TS13 SCR PIN CONFIGURATION CHN 035 dmo 265 chn 605 nB00
    Text: XRT86VL32 PRELIMINARY PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.0.0 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86VL32 provides protection


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    PDF XRT86VL32 XRT86VL32 DMO 565 R chn 648 equivalent CHN 507 CHN 618 CHN 552 TS13 SCR PIN CONFIGURATION CHN 035 dmo 265 chn 605 nB00

    CHN 932

    Abstract: No abstract text available
    Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.1.0 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection


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    PDF XRT86L34 XRT86L34 CHN 932

    DMO 565 R

    Abstract: CHN 652 CHN 933 chn 539 W0104 CHN 628 CHN 523 chn 648 equivalent 3667 ict XRT86L34IB
    Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO MAY 2004 REV. P1.1.1 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection


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    PDF XRT86L34 XRT86L34 DMO 565 R CHN 652 CHN 933 chn 539 W0104 CHN 628 CHN 523 chn 648 equivalent 3667 ict XRT86L34IB

    ST CHN 510

    Abstract: 83C97 chn 809 chn 809 ST
    Text: 83C97 T e chn o log y, In co rp o rate d 10BASE-T Ethernet Transceiver With On Chip Filters and Digital Interface and Serial Port PRELIMINARY October 1994 SEEQ AutoDUPLEX Designation S ym bol indentifies product as A u to D U P L E X device. Description


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    PDF 83C97 10BASE-T 83C97 10BASET) ST CHN 510 chn 809 chn 809 ST

    chn 809

    Abstract: chn 809 ST Transistor TT 2246 transistor chn 037 MO40 TT 2246 transistor capacitor JA8 KMA Series 232 pin diagram of BC 547 SABRE 408
    Text: 83C95 T e chn o log y, Inco rp o rate d 10BASE-T Ethernet Transceiver With On Chip Filters And AUI PRELIMINARY October 1994 S E E Q A u to D U P L E X D esignation Symbol indentifies product as AutoDUPLEX device. D escription The 83C95 is a highly integrated analog interface 1C for


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    PDF 83C95 10BASE-T 83C95 10BASET) 10BASET chn 809 chn 809 ST Transistor TT 2246 transistor chn 037 MO40 TT 2246 transistor capacitor JA8 KMA Series 232 pin diagram of BC 547 SABRE 408

    Transistor TT 2246

    Abstract: transistor chn 911 TT 2246 transistor jm31a pulse electronics era transformer transistor chn 037 chn 809 S4744
    Text: SEEQ T e chn o log y, Inco rp o rate d 83C96 10BASE-T Ethernet Transceiver With On Chip Filters and Digital Interface PRELIMINARY October 1994 SEEQ AutoDUPLEX Designation Sym bol indentifies product as A u to D U P L E X device. Description The 83C96 is a highly integrated analog interface 1C for


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    PDF 83C96 10BASE-T 83C96 10BASET) 10BASET Transistor TT 2246 transistor chn 911 TT 2246 transistor jm31a pulse electronics era transformer transistor chn 037 chn 809 S4744

    sla6050

    Abstract: S-MOS Systems chn 513 S-MOS SYSTEMS INC sla6430 SLA6000 CHN 820
    Text: s m a r mw' r w •a s . \ i\. i ?â \ .i i _ ' m m \ t Hi ill 11 Ik . SYSTEMS CMOS GATE ARRAYS 5 ,-i>° Û 000949 SLA 6000 GENERAL DESCRIPTION FEATURES The SLA 6000 series consists of a group of 10 C M O S gate arrays w ith gate co un ts from 513 to 6206 gates.


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    PDF SLA6000 SLA6000 sla6050 S-MOS Systems chn 513 S-MOS SYSTEMS INC sla6430 CHN 820

    JTp s5

    Abstract: No abstract text available
    Text: 3.3V CMOS 16-BIT REGISTER 3-STATE jd t) IDT74FCT1 63374/A/C Integrated D evice Technology, Inc. FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology The FCT163374/A/C 16-bit edge-triggered D-type regis­ ters are built using advanced dual metal CMOS technology.


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    PDF 16-BIT IDT74FCT1 63374/A/C FCT163374/A/C 374/A JTp s5