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    BD 3445 E Search Results

    BD 3445 E Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    344-5010-065 Amphenol Communications Solutions GbX ,Backplane connectors,4 pair, 10 position, open, 5.55mm, Header Visit Amphenol Communications Solutions
    344-5010-063 Amphenol Communications Solutions GbX ,Backplane connectors,4 pair, 10 position, open, 3.55mm, Header Visit Amphenol Communications Solutions
    344-5025-063 Amphenol Communications Solutions GbX ,Backplane connectors,4 pair, 25 position, open, 3.55mm, Header Visit Amphenol Communications Solutions
    344-5025-064 Amphenol Communications Solutions GbX ,Backplane connectors,4 pair, 25position, open, 4.55mm, Header Visit Amphenol Communications Solutions
    344-5010-064 Amphenol Communications Solutions GbX ,Backplane connectors,4 pair, 10 position, open, 4.55mm, Header Visit Amphenol Communications Solutions

    BD 3445 E Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    KLT20

    Abstract: HLT20 SO-8 HLT20 TSSOP-8 socket ic so8 socket
    Text: MC10ELT20, MC100ELT20 5V TTL to Differential PECL Translator The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of


    Original     		PDF MC10ELT20, MC100ELT20 MC10ELT/100ELT20 ELT20 HLT20 KLT20 MC100ELT20 AN1404 AN1405 HLT20 SO-8 TSSOP-8 socket ic so8 socket

    HEL01

    Abstract: transistor E101 KEL01
    Text: MC10EL01, MC100EL01 5V ECL 4-Input OR/NOR The MC10EL/100EL01 is a 4-input OR/NOR gate. The device is functionally equivalent to the E101 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E101, the EL01 is ideally suited for those


    Original     		PDF MC10EL01, MC100EL01 MC10EL/100EL01 HEL01 KEL01 AND8020 AN1404 AN1405 AN1406 AN1503 transistor E101

    HEL35

    Abstract: KEL35 KL35 MC100EL35
    Text: MC10EL35, MC100EL35 5V ECL JK Flip-Flop The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is asynchronous and is activated with a logic


    Original     		PDF MC10EL35, MC100EL35 MC10EL/100EL35 HEL35 KEL35 AND8020 AN1404 AN1405 AN1406 AN1503 KL35

    Untitled

    Abstract: No abstract text available
    Text: MC100EL59 5V ECL Triple 2:1 Multiplexer The MC100EL59 is a triple 2:1 multiplexer with differential outputs. The output data of the multiplexers can be controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device useful for both data path and random


    Original     		PDF MC100EL59 AND8020 AN1404 AN1405 AN1406 AN1503 AN1504 AN1560 AN1568

    KEL04

    Abstract: HL04 HEL04 ECL IC NAND
    Text: MC10EL04, MC100EL04 5V ECL 2-Input AND/NAND The MC10EL/100EL04 is a 2-input AND/NAND gate. The device is functionally equivalent to the E104 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E104, the EL04 is ideally suited for those


    Original     		PDF MC10EL04, MC100EL04 MC10EL/100EL04 HEL04 KEL04 AND8020 AN1404 AN1405 AN1406 AN1503 HL04 ECL IC NAND

    KEL31

    Abstract: hel31 HEL31 SOIC8
    Text: MC10EL31, MC100EL31 5 V ECL D Flip-Flop With Set and Reset The MC10EL/100EL31 is a D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally


    Original     		PDF MC10EL31, MC100EL31 MC10EL/100EL31 MC100EL31 AN1404 AN1405 AN1406 AN1503 AN1504 KEL31 hel31 HEL31 SOIC8

    100EL90

    Abstract: Application Note AND8002/D
    Text: MC100EL90 −3.3V / −5V Triple ECL Input to PECL Output Translator The MC100EL90 is a triple ECL to PECL translator. The device receives either −3.3 V or −5 V differential ECL signals, determined by the VEE supply level, and translates them to standard +5 V differential PECL


    Original     		PDF MC100EL90 AND8020 AN1404 AN1405 AN1406 AN1503 AN1504 AN1560 AN1568 100EL90 Application Note AND8002/D

    HEL05

    Abstract: KEL05 hl05 ECL IC NAND
    Text: MC10EL05, MC100EL05 5V ECL 2-Input Differential AND/NAND The MC10EL/100EL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the E404 device with higher performance capabilities. With propagation delays and output transition


    Original     		PDF MC10EL05, MC100EL05 MC10EL/100EL05 AND8020 AN1404 AN1405 AN1406 AN1503 AN1504 AN1560 HEL05 KEL05 hl05 ECL IC NAND

    KLT20

    Abstract: ELT20 HT20 MC100ELT20 MC10ELT20 HLT20 BD 3445 E
    Text: MC10ELT20, MC100ELT20 5VĄTTL to Differential PECL Translator The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of


    Original     		PDF MC10ELT20, MC100ELT20 MC10ELT/100ELT20 ELT20 HLT20 r14525 MC10ELT20/D KLT20 HT20 MC100ELT20 MC10ELT20 HLT20 BD 3445 E

    KEL52

    Abstract: hel52 TRANSISTOR bd 657 KL52
    Text: MC10EL52, MC100EL52 5V ECL Differential Data and Clock D Flip-Flop The MC10EL/100EL52 is a differential data, differential clock D flip-flop with reset. The device is functionally equivalent to the E452 device with higher performance capabilities. With propagation delays and


    Original     		PDF MC10EL52, MC100EL52 MC10EL/100EL52 AND8020 AN1404 AN1405 AN1406 AN1503 AN1504 AN1560 KEL52 hel52 TRANSISTOR bd 657 KL52

    hel32

    Abstract: KEL32 transistor BD 540 MC100EL32
    Text: MC10EL32, MC100EL32 5V ECL ÷2 Divider The MC10EL/100EL32 is an integrated ÷2 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions,


    Original     		PDF MC10EL32, MC100EL32 MC10EL/100EL32 AND8020 AN1404 AN1405 AN1406 AN1503 AN1504 AN1560 hel32 KEL32 transistor BD 540

    KEL51

    Abstract: HEL51
    Text: MC10EL51, MC100EL51 5V ECL Differential Clock D Flip-Flop The MC10EL/100EL51 is a differential clock D flip-flop with reset. The device is functionally similar to the E151 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E151 the EL51 is ideally


    Original     		PDF MC10EL51, MC100EL51 MC10EL/100EL51 AND8020 AN1404 AN1405 AN1406 AN1503 AN1504 AN1560 KEL51 HEL51

    KLT28

    Abstract: HLT28 HT28 KT28 MC100ELT28 MC10ELT28 transistor k 4110
    Text: MC10ELT28, MC100ELT28 5V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are


    Original     		PDF MC10ELT28, MC100ELT28 MC10ELT/100ELT28 ELT28 r14525 MC10ELT28/D KLT28 HLT28 HT28 KT28 MC100ELT28 MC10ELT28 transistor k 4110

    100el29

    Abstract: No abstract text available
    Text: MC100EL29 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset The MC100EL29 is a dual master−slave flip flop. The device features fully differential Data and Clock inputs as well as outputs. Data enters the master latch when the clock is LOW and transfers to


    Original     		PDF MC100EL29 AND8020 MC100EL29 AN1404 AN1405 AN1406 AN1503 AN1504 AN1560 100el29

    KEL01

    Abstract: HEL01 MC100EL01 MC10EL01
    Text: MC10EL01, MC100EL01 5VĄECL 4ĆInput OR/NOR The MC10EL/100EL01 is a 4-input OR/NOR gate. The device is functionally equivalent to the E101 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E101, the EL01 is ideally suited for those


    Original     		PDF MC10EL01, MC100EL01 MC10EL/100EL01 AND8003/D r14525 MC10EL01/D KEL01 HEL01 MC100EL01 MC10EL01

    HEL12

    Abstract: HL12 KEL12 MC10EL12DR2 E112 EL12 MC100EL12 MC10EL12
    Text: MC10EL12, MC100EL12 5VĄECL Low Impedance Driver The MC10EL/100EL12 is a low impedance drive buffer. With two pairs of OR/NOR outputs the device is ideally suited for high drive applications such as memory addressing. The device is a function equivalent to the E112 device with higher performance capabilities.


    Original     		PDF MC10EL12, MC100EL12 MC10EL/100EL12 r14525 MC10EL12/D HEL12 HL12 KEL12 MC10EL12DR2 E112 EL12 MC100EL12 MC10EL12

    KEL04

    Abstract: HL04 HEL04 e104 MC100EL04 MC10EL04 HL-04
    Text: MC10EL04, MC100EL04 5VĄECL 2ĆInput AND/NAND The MC10EL/100EL04 is a 2-input AND/NAND gate. The device is functionally equivalent to the E104 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E104, the EL04 is ideally suited for those


    Original     		PDF MC10EL04, MC100EL04 MC10EL/100EL04 AND8003/D r14525 MC10EL04/D KEL04 HL04 HEL04 e104 MC100EL04 MC10EL04 HL-04

    KEL07

    Abstract: HL-07 E107 MC100EL07 MC10EL07 hl07 IC HEL07
    Text: MC10EL07, MC100EL07 5VĄECL 2ĆInput XOR/XNOR The MC10EL/100EL07 is a 2-input XOR/XNOR gate. The device is functionally equivalent to the E107 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E107, the EL07 is ideally suited for those


    Original     		PDF MC10EL07, MC100EL07 MC10EL/100EL07 AND8003/D r14525 MC10EL07/D KEL07 HL-07 E107 MC100EL07 MC10EL07 hl07 IC HEL07

    MC100EL30

    Abstract: MC100EL30DW MC100EL30DWR2
    Text: MC100EL30 5VĄECL Triple D Flip-Flop with Set and Reset The MC100EL30 is a triple master–slave D flip flop with differential outputs. Data enters the master latch when the clock input is LOW and transfers to the slave upon a positive transition on the clock input.


    Original     		PDF MC100EL30 MC100EL30 r14525 MC100EL30/D MC100EL30DW MC100EL30DWR2

    KEL33

    Abstract: kl-33 HEL33 MC100EL33 EL33 MC10EL33 KL33 hl33
    Text: MC10EL33, MC100EL33 5V ECL ÷4 Divider The MC10EL/100EL33 is an integrated ÷4 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions,


    Original     		PDF MC10EL33, MC100EL33 MC10EL/100EL33 r14525 MC10EL33/D KEL33 kl-33 HEL33 MC100EL33 EL33 MC10EL33 KL33 hl33

    AND8020

    Abstract: MC100EL13 MC100EL13DW MC100EL13DWR2 100EL13
    Text: MC100EL13 5VĄECL Dual 1:3 Fanout Buffer The MC100EL13 is a dual, fully differential 1:3 fanout buffer. The Low Output–Output Skew of the device makes it ideal for distributing two different frequency synchronous signals. The differential inputs have special circuitry which ensures device


    Original     		PDF MC100EL13 MC100EL13 r14525 MC100EL13/D AND8020 MC100EL13DW MC100EL13DWR2 100EL13

    EL33

    Abstract: HEL33 KEL33 MC100EL33 MC10EL33 kl-33
    Text: MC10EL33, MC100EL33 5VĄECL ÷4 Divider The MC10EL/100EL33 is an integrated ÷4 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions,


    Original     		PDF MC10EL33, MC100EL33 MC10EL/100EL33 r14525 MC10EL33/D EL33 HEL33 KEL33 MC100EL33 MC10EL33 kl-33

    AND8020

    Abstract: EL90 MC100EL90 MC100EL90DW MC100EL90DWR2 100EL90
    Text: MC100EL90 -3.3V / -5VĄTriple ECL Input to PECL Output Translator The MC100EL90 is a triple ECL to PECL translator. The device receives either –3.3 V or –5 V differential ECL signals, determined by the VEE supply level, and translates them to standard +5 V differential PECL


    Original     		PDF MC100EL90 MC100EL90 r14525 MC100EL90/D AND8020 EL90 MC100EL90DW MC100EL90DWR2 100EL90

    KEL32

    Abstract: HEL32 MC100EL32 KL32 MC10EL32
    Text: MC10EL32, MC100EL32 5VĄECL ÷2 Divider The MC10EL/100EL32 is an integrated ÷2 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions,


    Original     		PDF MC10EL32, MC100EL32 MC10EL/100EL32 r14525 MC10EL32/D KEL32 HEL32 MC100EL32 KL32 MC10EL32