siemens sab 82538
Abstract: 3tb siemens T-0657 SiEMENS PM 350 98 SAB 80188 QD70 SIEMENS ESCC8 1fa MARKING processor hbt 00 04 g Q67100-H6441
Text: SIEM ENS Enhanced Serial Communication Controller ESCC8 SAB 82538 SAF 82538 Preliminary Data 1 CMOS 1C General Features Serial Interface • Eight independent full duplex serial channels - On chip clock generation or external clock source - On chip DPLL for clock recovery of each
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CRC-32
fl23Sb05
siemens sab 82538
3tb siemens
T-0657
SiEMENS PM 350 98
SAB 80188
QD70
SIEMENS ESCC8
1fa MARKING
processor hbt 00 04 g
Q67100-H6441
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tda6610-2
Abstract: vn19 V10-3 AV15 66102 C901 siemens s30 TDA6610
Text: t»0 E » • flS3St.05 OOM^Obl bflE « S I E C SIEMENS SIEMENS AKTIEN6ESELLSCHAF T ' - n - e n - o "7 TV-Stereo Processor TDA 6610-2 Bipolar IC Features • • • • • A ll functions are I 2C -bus controlled Suitable for m ultistandard including NICAM SCARTinterface
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fl535b05
Q67000-A5026
P-DIP-28
fl235b05
UEQQ3424
tda6610-2
vn19
V10-3
AV15
66102
C901
siemens s30
TDA6610
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siemens C167
Abstract: siemens sab-C167 SAB-C167-LM 711S C167 instruction set C167 loader t41e Siemens C16x Family Instruction Set Manual FE7C IT46
Text: SIEMENS C16x-Family of High-Performance CMOS 16-Bit Microcontrollers C167 Preliminary C167 16-Bit Microcontroller • High Performance 16-bit CPU with 4-Stage Pipeline • 100 ns Instruction Cycle Tim e at20-M Hz CPU Clock • 500 ns M ultiplication 1 6 x 1 6
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C16x-Family
16-Bit
20-MHz
16x16
A235b05
DGS7272
P-MGFP-144-1
siemens C167
siemens sab-C167
SAB-C167-LM
711S
C167 instruction set
C167 loader
t41e
Siemens C16x Family Instruction Set Manual
FE7C
IT46
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Untitled
Abstract: No abstract text available
Text: S IE M E N S BCR 133S NPN Silicon Digital Transistor Array »Switching circuit, inverter, interface circuit, driver circuit >Two galvanic internal isolated Transistors in one package >Built in bias resistors (R-|=10kA, R2=10kfl) Type BCR 133S Marking Ordering Code Pin Configuration
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10kfl)
Q62702-C2376
OT-363
01S0713
fi235bD5
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SIEMENS BSt L 45 100
Abstract: 0D4T
Text: bOE ] • flE3SbDS DD4T371 274 M S I E S SIEM ENS SIEMENS AKTIENGESELLSCHAF Nonvolatile Memory 1-Kbit E2PROM with I 2C Bus SDA 2516-2 Preliminary Data MOS IC Features • W ord-organized, reprogrammable nonvolatile memory in n-channel floating-gate technology E2PROM)
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DD4T371
SIEMENS BSt L 45 100
0D4T
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SIEMENS BST P45
Abstract: fet bd 736 SIEMENS BST P35 SIEMENS BST H 61 siemens cpu 314 SIEMENS BST n 35 80 80c537-n-t40 80C537-16-M SIEMENS BST g 02 60 B8005
Text: bOE ]> • ÖE3SbDS GQ47M7T bbl « S I E G SIEMENS AKTIENGESELLSCHAF SIEMENS High-Performance 8-Bit CMOS Single-Chip Microcontroller SAB 80C517/80C537 Advanced Information SAB 80C517 SAB 80C537 Microcontroller with factory mask-programmable ROM Microcontroller for external ROM
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GQ47M7T
80C517
80C537
80C517/80C537
32-bit
16-bit
80C515
fl235b05
CS00796
SIEMENS BST P45
fet bd 736
SIEMENS BST P35
SIEMENS BST H 61
siemens cpu 314
SIEMENS BST n 35 80
80c537-n-t40
80C537-16-M
SIEMENS BST g 02 60
B8005
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Siemens k1403
Abstract: SKM 181 R siemens Package Outlines P-LCC Q67100-H6562 ic ZN 415 SBGX skm 191 siemens si 200 LC Communication cable pin diagram k1403 marking kjd
Text: S IE M E N S S /T Bus Interface C ircuit Extended 1 PEB 2081 Features • Full duplex 2B+D S/T-interface transceiver according to the following specifications: - ITU Recommendation 1.430 - ETS 300 012 - ANSI T 1.605 • 192 kbit/s transmission rate • Pseudo-ternary coding with 100 % pulse width
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P-LCC-28-R
251BI
25IAI
A23SbDS
Siemens k1403
SKM 181 R
siemens Package Outlines P-LCC
Q67100-H6562
ic ZN 415
SBGX
skm 191
siemens si 200 LC Communication cable pin diagram
k1403
marking kjd
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FCK2A
Abstract: No abstract text available
Text: SIEMENS 16 MBit Synchronous DRAM • High Performance: -8 /cK MAX • HYB 39S16400/800/160CT-8/-10 125 • -10 Units • Automatic and Controlled Precharge Command 100 MHz ?CK3 8 10 !AC3 6 ?CK2 10 12 ns ?AC2 6 8 ns 7 Multiple Burst Read with Single Write
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39S16400/800/160CT-8/-10
cycles/64
fl235b05
FCK2A
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Untitled
Abstract: No abstract text available
Text: SIEMENS 3.3V 1M x 64-Bit SDRAM Module 3.3V 1M x 72-Bit SDRAM Module HYS64V1000GU HYS72V1000GU 168 pin unbuffered DIMM Modules Preliminary Information • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-In-Line SDRAM Module • 1 bank 1M x 64, 1M x 72 organisation
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64-Bit
72-Bit
HYS64V1000GU
HYS72V1000GU
HYS64
V1000GU
fl235bOS
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BTS113-A
Abstract: No abstract text available
Text: SIEMENS TEMPFET BTS113A Features • • • • • N channel Logic level Enhancement mode Temperature sensor with thyristor characteristic The drain pin is electrically shorted to the tab Pin Type BTS113A v DS 60 V h 11.5 A ^DS on 0.17 i i 1 2 3 G D S
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BTS113A
TQ-220AB
C67078-S5015-A2
SIT004S9
023SbQS
B23SbDS
BTS113-A
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Untitled
Abstract: No abstract text available
Text: SIEM ENS A udio R inging C odec Filter B asic Function A R C O FI-B A Version 1.1 1.3 PSB 2161 BICMOS Features • Applications in digital terminal equipment featuring voice functions • Digital signal processing performs all CODEC functions • Fully compatible to the ITU-T G. 712 and ETSI
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NET33)
16-bit
023Sb05
010271b
P-DSO-28-1
fl235b05
D1DE717
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PMB2307R
Abstract: PMB2307 SIEMENS 2306 DECT siemens dect pmb 30MHZ "Mobile Communication ICs" PMB2307 equivalent
Text: SIEMENS PMB 2307R PLL-Frequency Synthesizer Preliminary Data CMOS 1C Features • • • • Low operating current consumption typically 3.5 mA High input sensitivity, high input frequencies (220 MHz) Extremely fast phase detector without dead zone Linearization of the phase detector output by current
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2307R
65-MHz
detector70
PMB2307R
PMB2307
SIEMENS 2306
DECT siemens
dect pmb
30MHZ
"Mobile Communication ICs"
PMB2307 equivalent
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Untitled
Abstract: No abstract text available
Text: SIEMENS Nonvolatile Memory 2-Kbit E2PROM with l 2C Bus and 2 K Write Protection SDA 3526 MOS 1C Features • Word-organized programmable nonvolatile memory in n-channel floating-gate technology E2PROM • 256 x 8-bit organization • Supply voltage 5 V • Serial 2-line bus for data input and output (I2C Bus)
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Q67100-H3254
Q67100-H34
E1414
023SbG5
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Untitled
Abstract: No abstract text available
Text: SIEMENS 16 MBit Synchronous DRAM Preliminary Information • High Performance: CAS latency = 3 -10 -12 Units fCK 100 83 MHz tCK3 10 12 ns tAC3 8 10 ns Multiple Burst Read with Operation Automatic Command and Controlled Single Write Precharge Data Mask for Read / Write control x4, x8
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fl235b05
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