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    JESD78 Search Results

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    Untitled

    Abstract: No abstract text available
    Text: PI74LVCC4245A 8-Bit Dual Supply Bus Transceiver with Configurable Output Voltage and 3-State Outputs Product Features Product Description • 4.5V to 5.5V on A-port and 2.7V to 5.5V on B-port • Latch-up performance exceeds 200mA Per JESD78 • ESD protection exceeds JESD 22


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    PDF PI74LVCC4245A 200mA JESD78 A114-B) A115-A) 24-pin 173-mil 150-mil

    Untitled

    Abstract: No abstract text available
    Text: DG2799 Vishay Siliconix Low Voltage, Low On-Resistance, Dual DPDT Analog Switch FEATURES BENEFITS D Low Voltage Operation 1.65 V to 4.3 V D Low On-Resistance - rON: 0.25 W @ 2.7 V D Fast Switching: tON = 28 ns tOFF = 17 ns D QFN-16 (3x3) Package D Latch-Up Current >300 mA (JESD78)


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    PDF DG2799 QFN-16 JESD78) DG2799 HP4192A S-51097--Rev. 13-Jun-05

    A115-A

    Abstract: JESD22 JESD78 PI74LVC3245A PI74LVC3245ALE
    Text: PI74LVC3245A 8-Bit Dual Supply Bus Transceiver with 3-State Outputs Product Features Product Description • • • • 2.7V to 3.6V on A-port and 4.5V to 5.5V on B-port TTL Compatible Inputs Latch-up performance exceeds 200mA Per JESD78 ESD protection exceeds JESD22


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    PDF PI74LVC3245A 200mA JESD78 JESD22 A114-B) A115-A) 24-pin 173-mil 150-mil A115-A JESD22 JESD78 PI74LVC3245A PI74LVC3245ALE

    SSTV16857

    Abstract: No abstract text available
    Text: TV16857 CY2SSTV16857 14-Bit Registered Buffer Features • Differential Clock Signal • Supports LVTTL switching levels on the RESET pin • Output drivers have controlled edge rates, so no external resistors are required. • 2 KV ESD protection • Latch-up performance exceeds 100 mA: JESD78, Class


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    PDF TV16857 CY2SSTV16857 14-Bit JESD78, JESD82-3) CY2SSTV16857 SSTV16857

    A115-A

    Abstract: JESD78 PI74LVCC4245A PI74LVCC4245AL PI74LVCC4245AQ PI74LVCC4245AS
    Text: ADVANCE INFORMATION PI74LVCC4245A 8-Bit Dual Supply Bus Transceiver with Configurable Output Voltage and 3-State Outputs Product Features Product Description • 4.5V to 5.5V on A-port and 2.7V to 5.5V on B-port • Latch-up performance exceeds 200mA Per JESD78


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    PDF PI74LVCC4245A 200mA JESD78 A114-B) A115-A) 24-pin 173-mil 150-mil A115-A JESD78 PI74LVCC4245A PI74LVCC4245AL PI74LVCC4245AQ PI74LVCC4245AS

    Untitled

    Abstract: No abstract text available
    Text: DG2799 Vishay Siliconix Low Voltage, Low On-Resistance, Dual DPDT Analog Switch FEATURES BENEFITS D Low Voltage Operation 1.65 V to 4.3 V D Low On-Resistance - rON: 0.25 W @ 2.7 V D Fast Switching: tON = 28 ns tOFF = 17 ns D QFN-16 (3x3) Package D Latch-Up Current >300 mA (JESD78)


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    PDF DG2799 QFN-16 JESD78) DG2799 HP4192A S-51097--Rev. 13-Jun-05

    PI74LVC4245A

    Abstract: PI74LVC4245ALE A115-A JESD78 PI74LVC4245AL PI74LVC4245AQ PI74LVC4245AS
    Text: PI74LVC4245A 8-Bit Dual Supply Bus Transceiver with 3-State Outputs Product Features Product Description • 4.5V to 5.5V on A-port and 2.7V to 3.6V on B-port • Latch-up performance exceeds 200mA Per JESD78 • ESD protection exceeds JESD 22 – 2000V Human-Body Model A114-B


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    PDF PI74LVC4245A 200mA JESD78 A114-B) A115-A) 24-pin 173-mil 150-mil PI74LVC4245A PI74LVC4245ALE A115-A JESD78 PI74LVC4245AL PI74LVC4245AQ PI74LVC4245AS

    SSTV16857

    Abstract: CY2SSTV16857 CY2SSTV16857ZC CY2SSTV16857ZCT JESD78
    Text: TV16857 CY2SSTV16857 14-Bit Registered Buffer Features • Differential Clock Signal • Supports LVTTL switching levels on the RESET pin • Output drivers have controlled edge rates, so no external resistors are required. • 2 KV ESD protection • Latch-up performance exceeds 100 mA: JESD78, Class


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    PDF TV16857 CY2SSTV16857 14-Bit JESD78, JESD82-3) CY2SSTV16857 SSTV16857 CY2SSTV16857ZC CY2SSTV16857ZCT JESD78

    PI74LVC4245A

    Abstract: PI74LVC4245AL PI74LVC4245AQ PI74LVC4245AS JESD78 A115-A
    Text: ADVANCE INFORMATION PI74LVC4245A 8-Bit Dual Supply Bus Transceiver with 3-State Outputs Product Features Product Description • 4.5V to 5.5V on A-port and 2.7V to 3.6V on B-port • Latch-up performance exceeds 200mA Per JESD78 • ESD protection exceeds JESD 22


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    PDF PI74LVC4245A 200mA JESD78 A114-B) A115-A) 24-pin 173-mil 150-mil PI74LVC4245A PI74LVC4245AL PI74LVC4245AQ PI74LVC4245AS JESD78 A115-A

    Untitled

    Abstract: No abstract text available
    Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120 - MARCH 2000 D D D D D D D Supports UXGA Resolution Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock


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    PDF TFP401, TFP401A SLDS120

    ncp46

    Abstract: AQ28 XDFN marking 255 SC-70 AQ25
    Text: NCP4681, NCP4684 150 mA, Ultra Low Quiescent Current, Low Dropout Regulator The NCP4681 and NCP4684 are CMOS Linear voltage regulators with 150 mA output current capability and ultra low supply currents 1 mA typ. The devices are easy to use and include output current


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    PDF NCP4681, NCP4684 NCP4681 NCP4681/D ncp46 AQ28 XDFN marking 255 SC-70 AQ25

    hc589ag

    Abstract: 74HC589 HC589a MC74HC589ANG HC589 74HC589A MC74HC589ADG
    Text: MC74HC589A 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output http://onsemi.com High−Performance Silicon−Gate CMOS The MC74HC589A device consists of an 8−bit storage latch which feeds parallel data to an 8−bit shift register. Data can also be loaded


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    PDF MC74HC589A HC589A PDIP-16 MC74HC589AN MC74HC589A/D hc589ag 74HC589 MC74HC589ANG HC589 74HC589A MC74HC589ADG

    NB6N11SMNG

    Abstract: No abstract text available
    Text: NB6N11S 3.3 V 1:2 AnyLevelE Input to LVDS Fanout Buffer / Translator Description The NB6N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and two identical


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    PDF NB6N11S NB6N11S/D NB6N11SMNG

    Untitled

    Abstract: No abstract text available
    Text: TFP501 PanelBus HDCP DIGITAL RECEIVER SLDS127B – JULY 2001 – REVISED AUGUST 2002 D Supports UXGA Resolution Output Pixel D D D D D D 4x Over-Sampling for Reduced Bit-Error Rates up to 165 MHz Digital Visual Interface (DVI) and High-Bandwidth Digital Content Protection


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    PDF TFP501 SLDS127B 48-bit

    Untitled

    Abstract: No abstract text available
    Text: TFP501 PanelBus HDCP DIGITAL RECEIVER SLDS127B − JULY 2001 − REVISED AUGUST 2002 D Supports UXGA Resolution Output Pixel D D D D D D 4x Over-Sampling for Reduced Bit-Error Rates up to 165 MHz Digital Visual Interface (DVI) and High-Bandwidth Digital Content Protection


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    PDF TFP501 SLDS127B 48-bit

    Theta-JC

    Abstract: No abstract text available
    Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120B - MARCH 2000 − REVISED JUNE 2003 D Supports UXGA Resolution D D D D D D Reduced Power Consumption − 1.8 V Core Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1


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    PDF TFP401, TFP401A SLDS120B Theta-JC

    MKW01Z128

    Abstract: MKW01 ARM cortex m0 LGA60 power generation POWER COMMAND Hmi 211 c.d.m. technology pit LGA-60 MKW01Z128 rev 5 pin of chn 743 MKW01Z128CHN
    Text: Freescale Semiconductor Advance Information Document Number: MKW01Z128 Rev. 0.0, 10/3/12 MKW01Z128 MKW01Z128  MKW01Z128 Highly-integrated, cost-effective single-package solution for sub-1 GHz applications 1 Introduction The MKW01Z device is highly-integrated,


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    PDF MKW01Z128 MKW01Z128 LGA-60 MKW01Z128CHN MKW01Z128CHN KW01Z128 MKW01 ARM cortex m0 LGA60 power generation POWER COMMAND Hmi 211 c.d.m. technology pit LGA-60 MKW01Z128 rev 5 pin of chn 743

    ups PURE SINE WAVE schematic diagram

    Abstract: 3 phase ups PURE SINE WAVE schematic diagram R262 BR262W30A103E1G BR262W30 electret mems microphone preamplifier BR262 WLCSP-30 BR262W26A103E1G make three phase ups schematic diagram
    Text: BelaSigna R262 Wideband Voice Capture and Noise Reduction Solution Introduction • Drop−in Solution that Works without Special Tuning • Consistently Captures Voice Regardless of Acoustic Environment or • • • • • • the Orientation of the Handheld Device While in Use


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    PDF BR262/D ups PURE SINE WAVE schematic diagram 3 phase ups PURE SINE WAVE schematic diagram R262 BR262W30A103E1G BR262W30 electret mems microphone preamplifier BR262 WLCSP-30 BR262W26A103E1G make three phase ups schematic diagram

    DS2788

    Abstract: Maxim DS2745
    Text: 1/9/2008 PRODUCT RELIABILITY REPORT FOR DS2745, Rev A2 Maxim Integrated Products 4401 South Beltwood Parkway Dallas, TX 75244-3292 Prepared by: Ken Wendel Reliability Engineering Manager Maxim Integrated Products 4401 South Beltwood Pkwy. Dallas, TX 75244-3292


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    PDF DS2745, DS2784 QJ714637A QJ738201B DS2788 Maxim DS2745

    CY8C38

    Abstract: CY8C3866 Cypress touch panel BOSCH CONNECTOR CATALOG CY8C3866LTI-068 CY8C3866PVI-070 CY8C3866AXI-039
    Text: PSoC 3: CY8C38 Family Datasheet ® Programmable System-on-Chip PSoC General Description With its unique array of configurable blocks, PSoC® 3 is a true system level solution providing microcontroller unit (MCU), memory, analog, and digital peripheral functions in a single chip. The CY8C38 family offers a modern method of signal acquisition, signal


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    PDF CY8C38 CY8C3866 Cypress touch panel BOSCH CONNECTOR CATALOG CY8C3866LTI-068 CY8C3866PVI-070 CY8C3866AXI-039

    IEC-CISPR25

    Abstract: No abstract text available
    Text: Atmel ATA6824C High Temperature H-bridge Motor Driver DATASHEET Features ● PWM and direction-controlled driving of four externally-powered NMOS transistors ● High temperature capability up to 200°C junction ● A programmable dead time is included to avoid peak currents within the H-bridge


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    PDF ATA6824C IEC-CISPR25

    quality and reliability report

    Abstract: No abstract text available
    Text: MAX1231 RELIABILITY REPORT FOR MAX1231BEEG+ PLASTIC ENCAPSULATED DEVICES July 8, 2011 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Approved by Sokhom Chum Quality Assurance Reliability Engineer Maxim Integrated Products. All rights reserved.


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    PDF MAX1231 MAX1231BEEG+ MAX1231 SMP1DA052W AC19-1 /-2500V JESD22-A114. /-250mA JESD78. quality and reliability report

    L74VHC1GT08

    Abstract: 74VHC1GT08 t08 sot-23 MARKING OK t08 SOT L74VHC1GT08DFT1 marking code t08 VHC1GT08 marking code 10 sot23 A114
    Text: LESHAN RADIO COMPANY, LTD. 2-Input AND Gate with LSTTL–Compatible Inputs L74VHC1GT08 The L74VHC1G08 is an advanced high speed CMOS 2–input AND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power issipation.


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    PDF L74VHC1GT08 L74VHC1G08 L74VHC1GT08 74VHC1GT08 t08 sot-23 MARKING OK t08 SOT L74VHC1GT08DFT1 marking code t08 VHC1GT08 marking code 10 sot23 A114

    TSMC 0.18um

    Abstract: No abstract text available
    Text: 11/15/2010 PRODUCT RELIABILITY REPORT FOR MAXQ613, Rev B1 Maxim Integrated Products 4401 South Beltwood Parkway Dallas, TX 75244-3292 Prepared by: Don Lipps Manager, Reliability Engineering Maxim Integrated Products 4401 South Beltwood Pkwy. Dallas, TX 75244-3292


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    PDF MAXQ613, DS34S132 DS26514 MAXQ61C QX108235A QZ106781AB QJ101861CH TSMC 0.18um