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    CY7C1352 Price and Stock

    Infineon Technologies AG CY7C1352G-133AXC

    IC SRAM 4.5MBIT PAR 100TQFP
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    DigiKey CY7C1352G-133AXC Tray 144 1
    • 1 $8.54
    • 10 $7.582
    • 100 $7.05525
    • 1000 $6.60097
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    Avnet Americas CY7C1352G-133AXC Tray 0 Weeks, 2 Days 126
    • 1 $5.955
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    CY7C1352G-133AXC Tray 11 Weeks 144
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    • 1000 $3.8688
    • 10000 $3.7752
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    Mouser Electronics CY7C1352G-133AXC 141
    • 1 $8.06
    • 10 $7.42
    • 100 $6.44
    • 1000 $6.43
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    Verical CY7C1352G-133AXC 138 54
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    • 100 $6.7625
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    CY7C1352G-133AXC 131 54
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    • 100 $6.7625
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    Rochester Electronics CY7C1352G-133AXC 269 1
    • 1 $5.75
    • 10 $5.75
    • 100 $5.41
    • 1000 $4.89
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    Chip1Stop CY7C1352G-133AXC Tray 2
    • 1 $2.88
    • 10 $2.88
    • 100 $2.88
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    Rochester Electronics LLC CY7C135-25JC

    IC SRAM 32KBIT PARALLEL 52PLCC
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    DigiKey CY7C135-25JC Bulk 14
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    • 100 $22.26
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    Infineon Technologies AG CY7C135-25JXI

    IC SRAM 32KBIT PARALLEL 52PLCC
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    DigiKey CY7C135-25JXI Tube 46
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    • 100 $34.09304
    • 1000 $34.09304
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    Rochester Electronics LLC CY7C135-20JCT

    IC SRAM 32KBIT PARALLEL 52PLCC
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    DigiKey CY7C135-20JCT Bulk 26
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    • 100 $11.74
    • 1000 $11.74
    • 10000 $11.74
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    Infineon Technologies AG CY7C1352F-100AC

    IC SRAM 4.5MBIT PAR 100TQFP
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    DigiKey CY7C1352F-100AC Bag
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    Find more CY7C1352 price and stock on Findchips.com

    CY7C1352 Datasheets (57)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1352 Cypress Semiconductor 256K x18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1352 Cypress Semiconductor 256K x18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C135-20JC Cypress Semiconductor 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores Original PDF
    CY7C135-20JC Cypress Semiconductor 4K x 8 Dual-Port Static RAMs and 4K x 8 Dual-Port Static RAM with Semaphores Original PDF
    CY7C135-20JC Cypress Semiconductor 4K x 8 Dual-Port Static RAMs and 4K x 8 Dual-Port Static RAM with Semaphores Scan PDF
    CY7C1352-100AC Cypress Semiconductor 256K x18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1352-100AC Cypress Semiconductor 256K x18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1352-100AC Cypress Semiconductor 256K x 18 Pipelined SRAM with NoBL Architecture Scan PDF
    CY7C1352-133AC Cypress Semiconductor 256K x18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1352-133AC Cypress Semiconductor 256K x18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1352-133AC Cypress Semiconductor 256K x 18 Pipelined SRAM with NoBL Architecture Scan PDF
    CY7C1352-143AC Cypress Semiconductor 256K x18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1352-143AC Cypress Semiconductor 256K x18 Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1352-143AC Cypress Semiconductor 256K x 18 Pipelined SRAM with NoBL Architecture Scan PDF
    CY7C135-25JC Cypress Semiconductor 4K x 8 Dual-Port Static RAMs and 4K x 8 Dual-Port Static RAM with Semaphores Original PDF
    CY7C135-25JC Cypress Semiconductor 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores Original PDF
    CY7C135-25JC Cypress Semiconductor 4K x 8 Dual-Port Static RAMs and 4K x 8 Dual-Port Static RAM with Semaphores Scan PDF
    CY7C135-25JI Cypress Semiconductor 4K x 8 Dual-Port Static RAMs and 4K x 8 Dual-Port Static RAM with Semaphores Original PDF
    CY7C135-25JI Cypress Semiconductor 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores Original PDF
    CY7C135-25JI Cypress Semiconductor 4K x 8 Dual-Port Static RAMs and 4K x 8 Dual-Port Static RAM with Semaphores Scan PDF

    CY7C1352 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CY7C1352G 4-Mbit 256 K x 18 Pipelined SRAM with NoBL Architecture 4-Mbit (256 K × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original     		PDF CY7C1352G CY7C1352G

    CY7C1352

    Abstract: MCM63Z818 MCM63Z819
    Text: CY7C1352 CY7C1352 256K x18 Pipelined SRAM with NoBL Architecture Features • Low standby power Functional Description • Pin compatible and functionally equivalent to ZBT™ devices MCM63Z818 and MT55L256L18P • Supports 143-MHz bus operations with zero wait states


    Original     		PDF 1CY7C1352 CY7C1352 MCM63Z818 MT55L256L18P 143-MHz CY7C1352 MCM63Z819

    CY7C1352B-100AC

    Abstract: cy7c1352b-166ac CY7C1352B MCM63Z818 MCM63Z819 1352B-2
    Text: PRELIMINARY CY7C1352B 256K x18 Pipelined SRAM with NoBL Architecture • Low standby power Features Functional Description The CY7C1352B is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of


    Original     		PDF CY7C1352B CY7C1352B MCM63Z819 MT55L256L18P. CY7C1352B-100AC cy7c1352b-166ac MCM63Z818 1352B-2

    CY7C1352

    Abstract: MCM63Z818 MCM63Z819
    Text: fax id: 1101 Back CY7C1352 PRELIMINARY 256K x18 Pipelined SRAM with NoBL Architecture Features • Low standby power • Pin compatible and functionally equivalent to ZBT devices MCM63Z818 and MT55L256L18P • Supports 143-MHz bus operations with zero wait states


    Original     		PDF CY7C1352 MCM63Z818 MT55L256L18P 143-MHz CY7C1352 MCM63Z819

    CY7C1352

    Abstract: MCM63Z818 MCM63Z819
    Text: PRELIMINARY CY7C1352 256K x18 Pipelined SRAM with NoBL Architecture • Low standby power Features • Pin compatible and functionally equivalent to ZBT devices MCM63Z818 and MT55L256L18P • Supports 143-MHz bus operations with zero wait states — Data is transferred on every clock


    Original     		PDF CY7C1352 MCM63Z818 MT55L256L18P 143-MHz CY7C1352 MCM63Z819

    CY7C1352G

    Abstract: CY7C1352G-166AXC CY7C1352G-166AXI CY7C1352G-200AXC CY7C1352G-200AXI CY7C1352G-250AXC CY7C1352G-250AXI
    Text: CY7C1352G PRELIMINARY 4-Mbit 256Kx18 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE


    Original     		PDF CY7C1352G 256Kx18) CY7C1352G CY7C1352G-166AXC CY7C1352G-166AXI CY7C1352G-200AXC CY7C1352G-200AXI CY7C1352G-250AXC CY7C1352G-250AXI

    CY7C1352

    Abstract: MCM63Z818 MCM63Z819
    Text: CY7C1352 256K x18 Pipelined SRAM with NoBL Architecture • Low standby power Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices MCM63Z818 and MT55L256L18P • Supports 143-MHz bus operations with zero wait states


    Original     		PDF CY7C1352 MCM63Z818 MT55L256L18P 143-MHz CY7C1352 MCM63Z819

    CY7C1352F-225AI

    Abstract: CY7C1352F-250AC CY7C1352F-250AI CY7C1352F CY7C1352F-200AC CY7C1352F-200AI CY7C1352F-225AC
    Text: CY7C1352F 4-Mbit 256Kx18 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1352F 256Kx18) CY7C1352F CY7C1352F-225AI CY7C1352F-250AC CY7C1352F-250AI CY7C1352F-200AC CY7C1352F-200AI CY7C1352F-225AC

    CY7C1352G

    Abstract: CY7C1352G-133AXC 419256 TQFP PACKAGE thermal resistance
    Text: CY7C1352G 4-Mbit 256K x 18 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1352G CY7C1352G CY7C1352G-133AXC 419256 TQFP PACKAGE thermal resistance

    CY7C1352

    Abstract: MCM63Z818 MCM63Z819
    Text: 352 CY7C1352 256K x18 Pipelined SRAM with NoBL Architecture Features • Low standby power Functional Description • Pin compatible and functionally equivalent to ZBT™ devices MCM63Z818 and MT55L256L18P • Supports 143-MHz bus operations with zero wait states


    Original     		PDF CY7C1352 MCM63Z818 MT55L256L18P 143-MHz CY7C1352 MCM63Z819

    Untitled

    Abstract: No abstract text available
    Text: CY7C1352G 4-Mbit 256 K x 18 Pipelined SRAM with NoBL Architecture 4-Mbit (256 K × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original     		PDF CY7C1352G 133-MHz 100-pin

    Untitled

    Abstract: No abstract text available
    Text: CY7C1352G 4-Mbit 256 K x 18 Pipelined SRAM with NoBL Architecture 4-Mbit (256 K × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description[1] • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original     		PDF CY7C1352G CY7C1352G

    CY7C1352G

    Abstract: CY7C1352G-133AXC
    Text: CY7C1352G 4-Mbit 256K x 18 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1352G CY7C1352G CY7C1352G-133AXC

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY CY7C1352F 256K x18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Fully registered inputs and outputs for pipelined


    Original     		PDF CY7C1352F 250-MHz 225-MHz 200-MHz 166-MHz 133-MHz 100-MHz 100-pin CY7C1352F

    Untitled

    Abstract: No abstract text available
    Text: CY7C1352G 4-Mbit 256 K x 18 Pipelined SRAM with NoBL Architecture 4-Mbit (256 K × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original     		PDF CY7C1352G CY7C1352G

    CY7C1352F

    Abstract: CY7C1352F-200AC CY7C1352F-200AI CY7C1352F-225AC CY7C1352F-225AI CY7C1352F-250AC CY7C1352F-250AI
    Text: CY7C1352F 4-Mbit 256Kx18 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1352F 256Kx18) CY7C1352F CY7C1352F-200AC CY7C1352F-200AI CY7C1352F-225AC CY7C1352F-225AI CY7C1352F-250AC CY7C1352F-250AI

    Untitled

    Abstract: No abstract text available
    Text: CY7C1352G 4-Mbit 256 K x 18 Pipelined SRAM with NoBL Architecture 4-Mbit (256 K × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original     		PDF CY7C1352G CY7C1352G

    CY7C1352G

    Abstract: CY7C1352G-133AXC
    Text: CY7C1352G 4-Mbit 256K x 18 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original     		PDF CY7C1352G CY7C1352G CY7C1352G-133AXC

    CY7C1352G

    Abstract: CY7C1352G-250AXC
    Text: CY7C1352G PRELIMINARY 4-Mbit 256Kx18 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE


    Original     		PDF CY7C1352G 256Kx18) CY7C1352G CY7C1352G-250AXC

    CY7C1352G

    Abstract: CY7C1352G-133AXC CY7C1352G-133AXI
    Text: CY7C1352G 4-Mbit 256 K x 18 Pipelined SRAM with NoBL Architecture 4-Mbit (256 K × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description[1] • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original     		PDF CY7C1352G CY7C1352G CY7C1352G-133AXC CY7C1352G-133AXI

    Untitled

    Abstract: No abstract text available
    Text: CY7C1352G 4-Mbit 256 K x 18 Pipelined SRAM with NoBL Architecture 4-Mbit (256 K × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original     		PDF CY7C1352G CY7C1352G 727-CY7C1352G-133AXC CY7C1352G-133AXC

    43ac

    Abstract: e11011
    Text: fax id: 1101 CY7C1352 PRELIMINARY 256K x18 Pipelined SRAM with NoBL Architecture Features • Low s ta n d b y p ow er • Pin c o m p a tib le and fu n c tio n a lly e q u iv a le n t to ZBT™ d e ­ vic es M C M 6 3Z 81 8 and M T 55L 25 6L 18 P • S u p p o rts 14 3 -M H z bus o p e ra tio n s w ith zero w a it states


    OCR Scan     		PDF CY7C1352 43ac e11011

    Untitled

    Abstract: No abstract text available
    Text: fax id: 1101 PRELIMINARY _ CY7C1352 '^ y p p j 7 C C ; 256Kx18 Pipelined SRAM with NoBL Architecture • Low s ta n d b y p ow er Features • Pin c o m p a tib le and fu n c tio n a lly equ ivalent to ZBT™ d e ­ vic es M C M 6 3Z 81 8 and M T 55L 25 6L 18 P


    OCR Scan     		PDF CY7C1352 256Kx18

    CY7C1352

    Abstract: MCM63Z818 MCM63Z819
    Text: CY7C1352 V CYPRESS 256K x18 Pipelined SRAM with NoBL Architecture • Low s ta n d b y p ow er Features • Pin c o m p a tib le and fu n c tio n a lly eq u iv alen t to ZB T™ d evic es M C M 6 3Z 81 8 and M T 55L 25 6L 18 P • S u p p o rts 14 3 -M H z bus o p e ra tio n s w ith zero w a it states


    OCR Scan     		PDF CY7C1352 MCM63Z818 MT55L256L18P 143-MHz 133-MHz 100-MHz 80-MHz CY7C1352 MCM63Z819