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    Untitled

    Abstract: No abstract text available
    Text: SSRAM AS5SP1M36DQ FIGURE 1: PIN ASSIGNMENT Top View 36Mb Pipelined Sync SRAM p 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 DQPC DQC DQc VDDQ VSSQ DQC DQC DQC DQC VSSQ VDDQ DQC DQC NC VDD NC VSS DQD DQD VDDQ VSSQ DQD DQD DQD DQD VSSQ VDDQ


    Original     		PDF AS5SP1M36DQ 100-pin -55oC 125oC 125oC) -40oC 105oC) AS5SP1M36DQ

    Untitled

    Abstract: No abstract text available
    Text: SSRAM AS5SP1M36DQ FIGURE 1: PIN ASSIGNMENT Top View 36Mb Pipelined Sync SRAM p 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 DQPC DQC DQc VDDQ VSSQ DQC DQC DQC DQC VSSQ VDDQ DQC DQC NC VDD NC VSS DQD DQD VDDQ VSSQ DQD DQD DQD DQD VSSQ VDDQ


    Original     		PDF AS5SP1M36DQ 100-pin -55oC 125oC 125oC) -40oC 105oC) AS5SP1M36DQ

    Cache Intel Pentium 4 Processors

    Abstract: AS5SP1M36
    Text: SSRAM AS5SP1M36 FIGURE 1: PIN ASSIGNMENT Top View 36Mb Pipelined Sync SRAM p • TQFP in copper lead frame for superior thermal performance • RoHs compliant options available MARKING /XT* /ET* /IT (1M x 36) MODE A A A A A1 A0 NC/72M A VSS VDD *Consult factory for /XT and /ET products.


    Original     		PDF AS5SP1M36 100-pin PIN8-05383 100mA 425mA 475mA 375mA AS5SP1M36 Cache Intel Pentium 4 Processors