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    74AC11008 Search Results

    74AC11008 Result Highlights (3)

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    74AC11008N Texas Instruments Quadruple 2-Input Positive-AND Gates 16-PDIP -40 to 85 Visit Texas Instruments Buy
    74AC11008D Texas Instruments Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Visit Texas Instruments Buy
    74AC11008PWR Texas Instruments Quadruple 2-Input Positive-AND Gates 16-TSSOP -40 to 85 Visit Texas Instruments Buy
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    74AC11008 Price and Stock

    Texas Instruments 74AC11008PWR

    IC GATE AND 4CH 2-INP 16TSSOP
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    DigiKey 74AC11008PWR Cut Tape 282 1
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    74AC11008PWR Digi-Reel 1
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    Rochester Electronics LLC 74AC11008D

    IC GATE AND 4CH 2-INP 16SOIC
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    DigiKey 74AC11008D Bulk 243
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    Texas Instruments 74AC11008D

    IC GATE AND 4CH 2-INP 16SOIC
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    DigiKey 74AC11008D Tube 1
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    Rochester Electronics 74AC11008D 60,054 1
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    Texas Instruments 74AC11008N

    IC GATE AND 4CH 2-INP 16DIP
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    DigiKey 74AC11008N Tube 450
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    Verical 74AC11008N 16,450 206
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    Quest Components 74AC11008N 108
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    Rochester Electronics 74AC11008N 40,194 1
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    Chip 1 Exchange 74AC11008N 182
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    Rochester Electronics LLC 74AC11008N

    IC GATE AND 4CH 2-INP 16DIP
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    DigiKey 74AC11008N Bulk 187
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    74AC11008 Datasheets (38)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AC11008 Texas Instruments QUADRUPLE 2-INPUT POSITIVE-AND GATE Original PDF
    74AC11008 Texas Instruments Quadruple 2-Input Positive-AND Gates Original PDF
    74AC11008D Texas Instruments 74AC11008 - Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008D Texas Instruments Quadruple 2-Input Positive-AND Gate Original PDF
    74AC11008D Texas Instruments Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008D Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74AC11008DE4 Texas Instruments 74AC11008 - Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008DE4 Texas Instruments Quadruple 2-Input Positive-AND Gates Original PDF
    74AC11008DE4 Texas Instruments Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008DG4 Texas Instruments 74AC11008 - Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008DG4 Texas Instruments Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008DR Texas Instruments 74AC11008 - Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008DR Texas Instruments QUADRUPLE 2-INPUT POSITIVE-AND GATES Original PDF
    74AC11008DR Texas Instruments Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008DRE4 Texas Instruments 74AC11008 - Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008DRE4 Texas Instruments Quadruple 2-Input Positive-AND Gates Original PDF
    74AC11008DRE4 Texas Instruments Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008DRG4 Texas Instruments 74AC11008 - Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008DRG4 Texas Instruments Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85 Original PDF
    74AC11008N Texas Instruments 74AC11008 - Quadruple 2-Input Positive-AND Gates 16-PDIP -40 to 85 Original PDF

    74AC11008 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil

    74AC11008D

    Abstract: 74AC11008 74AC11008DE4 74AC11008DR 74AC11008DRE4 74AC11008N 74AC11008NE4 74AC11008PWLE 74AC11008PWR
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil 74AC11008D 74AC11008 74AC11008DE4 74AC11008DR 74AC11008DRE4 74AC11008N 74AC11008NE4 74AC11008PWLE 74AC11008PWR

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil

    74AC11008

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil 74AC11008

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil MTSS001C 4040064/F MO-153

    74AC11008D

    Abstract: 74AC11008 74AC11008DE4 74AC11008DG4 74AC11008DR 74AC11008DRE4 74AC11008DRG4 74AC11008N 74AC11008NE4
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil 4040064/F MO-153 74AC11008D 74AC11008 74AC11008DE4 74AC11008DG4 74AC11008DR 74AC11008DRE4 74AC11008DRG4 74AC11008N 74AC11008NE4

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil MTSS001C 4040064/F MO-153

    74AC11008

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil 74AC11008

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil MTSS001C 4040064/F MO-153

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil MTSS001C 4040064/F MO-153

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil scyd013 sdyu001x sgyc003d scyb017a

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		PDF 74AC11008 SCAS014C 500-mA 300-mil

    hct 4047 bt

    Abstract: SN74ALS679 FCT Fast CMOS TTL Logic 74LS 4075 7804 inverter SN74368A DTL Logic 4069 CMOS hex inverter SN502 CD74AC374
    Text: IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold


    Original     		PDF SDYZ001A, SN74LS138D SN74LS138DR SN74LS138N SN74LS138N3 SN74LS138NSR images/sn74ls138 hct 4047 bt SN74ALS679 FCT Fast CMOS TTL Logic 74LS 4075 7804 inverter SN74368A DTL Logic 4069 CMOS hex inverter SN502 CD74AC374

    74HCT 4013

    Abstract: CD4078 4093 BF SN74368A SN74ALS679 LXZ Series 4069 CMOS hex inverter 2a2 vacuum tube CD74AC374 cd408
    Text: SN54HC240, SN74HC240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS128B – DECEMBER 1982 – REVISED MAY 1997 D D SN54HC240 . . . J OR W PACKAGE SN74HC240 . . . DW OR N PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers


    Original     		PDF SN54HC240, SN74HC240 SCLS128B 300-mil SN54HC240 SN74HC240 HC240 SDYZ001A, SN74HC240DW SN74HC240DWR 74HCT 4013 CD4078 4093 BF SN74368A SN74ALS679 LXZ Series 4069 CMOS hex inverter 2a2 vacuum tube CD74AC374 cd408

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original     		PDF P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS

    SN74ALVCH162245

    Abstract: Schottky Barrier Diode Bus-Termination Array SN7400 CLOCKED SLLS210 SCAD001D TEXAS INSTRUMENTS SN7400 SERIES buffer SN74LVCC4245 sn74154 SDAD001C SN7497
    Text: Section 4 Logic Selection Guide ABT – Advanced BiCMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 ABTE/ETL – Advanced BiCMOS Technology/ Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9


    Original     		PDF

    FT 4013 d dual flip flop

    Abstract: FT 4013 D flip flop 74HC octal bidirectional latch 74HCT 4013 DATASHEET 4511 pin configuration SN7432 fairchild CMOS TTL Logic Family Specifications 7805 acv Datasheet of decade counter CD 4017 sn74154
    Text: T H E W O R L D L E A D E R I N L O G I C P R O D U C T S Logic Selection Guide February 2000 1999 EEProduct News PRODUCTS OF THE YEAR AWARD New products for prototype design AVC Advanced Very-Low-Voltage CMOS Logic See Section 4 LOGIC OVERVIEW 1 FUNCTIONAL INDEX


    Original     		PDF

    D2S57

    Abstract: 54AC11008
    Text: 54AC11008, 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATES TI0046— D2S57, AUGUST 1987— REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11008 . . . J PACKAGE 74AC11008 . . . D OR N PACKAGE TOP VIEW Center-Pin V cc and GND Configurations to


    OCR Scan     		PDF 54AC11008, 74AC11008 TI0046-- D2S57, 500-mA 300-mll D2957, TI0046 D2S57 54AC11008

    Untitled

    Abstract: No abstract text available
    Text: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C - AUGUST 1987 - REVISED APRIL 1996 Flow-Through Architecture Optimizes PCB Layout • D, N, OR PW PACKAGE TOP VIEW Center-Pin V^c and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted


    OCR Scan     		PDF 74AC11008 SCAS014C 500-mA 300-mil

    AC11008

    Abstract: 54AC11008 74AC11008 D2957
    Text: 54AC11008, 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATES TI0046— D 2957, AU G U S T 1987— REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11008 . . . J PACKAGE 74AC11008 . . . D OH N PACKAGE TOP VIEW Center-Pin V c c and GND Configurations to


    OCR Scan     		PDF AC11008, 74AC11008 TI0046â D2957, 500-mA 300-mil 54AC11008 74AC11008 TI0046 AC11008 D2957

    54AC11008

    Abstract: 54AC11008/B2A
    Text: 54AC11008,74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATES D2957, AUGUST 19B7 - REVISED APRIL 1993 54AC11008. . . J PACKAGE 74AC11008 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-PIn Vcc and GND Configurations Minimize High-Speed Switching Noise


    OCR Scan     		PDF 54AC11008 74AC11008 D2957, 500-mA 300-mil 54AC11008/B2A