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    74S64 Price and Stock

    onsemi DM74S64N

    IC 4-2-3-2INPUT AND-OR INV 14DIP
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    DigiKey DM74S64N Tube 25
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    Rochester Electronics LLC SN74S64D

    IC GATE INV AND/OR
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    DigiKey SN74S64D Bulk 952
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    Rochester Electronics LLC SN74S64N

    IC GATE INV AND/OR
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    DigiKey SN74S64N Bulk 634
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    Rochester Electronics LLC SN74S64N3

    IC GATE INV AND/OR
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    DigiKey SN74S64N3 Bulk 952
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    Vishay Dale RWR74S6491FRBSL

    RES 6.49K OHM 5W 1% WW AXIAL
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    DigiKey RWR74S6491FRBSL Bulk 100
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    74S64 Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74S64 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    74S64 Signetics Gate Scan PDF
    74S64 Signetics Four Two Three Input AND-OR-INVERT Gate Scan PDF
    74S64 Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74S64C Unknown TTL Data Book 1980 Scan PDF
    74S64DC Fairchild Semiconductor 4-2-3-2 Input AND OR Invert Gate Scan PDF
    74S64FC Fairchild Semiconductor 4-2-3-2 Input AND OR Invert Gate Scan PDF
    74S64PC Fairchild Semiconductor 4-2-3-2 Input AND OR Invert Gate Scan PDF

    74S64 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    80286 disadvantage

    Abstract: DP84300 4 bit odd parity checker using XOR AND XOR COMPLEMENT comparison between intel 8086 and Zilog 80 microprocessor DP8400-2 DP8402A DP8408A DP8409A DP8417 DP84522
    Text: National Semiconductor Application Note 302 Charles Carinalli Mike Evans February 1986 INTRODUCTION The rapid development in dynamic random access memory DRAM chip storage capability coupled with significant component cost reductions has allowed designers to build


    Original     		PDF

    74LS244 diagram

    Abstract: 74LS31 74LS373 Decoder pin BYU29 TMS32010 74ALS02 74ALS32 ADC80Z 74F245 74LS373
    Text: Chapter 5 Theory of Operation The AIB has three basic input/output I/O ports: an analog I/O port, an expansion I/O port, and an extended memory interface port. The analog input port consists of an anti-aliasing filter, a sample and hold circuit, and an analog-to-digital (A/D) converter. The analog output port consists of a digital-toanalog converter, a smoothing filter, an an optional audio output amplifier. The expansion input port provides sixteen buffered inputs, and the expansion output port


    Original     		PDF

    74S64

    Abstract: logic symbol 74S logic symbol 74S64
    Text: 74S64 Signetics Gate Four-Two-Three-Two-Input AND-OR-Invert Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 3.5ns 8mA 74S64 ORDERING CODE COMMERCIAL RANGE V cc = 5 V ± 5 % ; Ta = 0°C »0 +70°C PACKAGES


    OCR Scan     		74S64 N74S64N N74S64D 10Sul F07570S 74S64 logic symbol 74S logic symbol 74S64 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74S64 Signetics Gate Four-Two-Three-Two-Input AND-OR-lnvert Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 3.5ns 8mA 74S64 ORDERING CODE COMMERCIAL RANGE VCC = 5V±5%; TA = 0°C to +70°C PACKAGES Plastic DIP


    OCR Scan     		74S64 N74S64N N74S64D 50/iA 10Sul F07S70S PDF

    SN54S64

    Abstract: SN54S65 SN74S64 SN74S65 271 texas
    Text: CIRCUIT TYPES SN54S64, SN54S65, 74S64, SN74S65 4-2-3-2-INPUT AND-OR-INVERT GATES J O R N D U A L - IN - L IN E O R SN54S64, SN 74S64 A C T IV E P U L L -U P • Typical Propagation Time W F L A T P A C K A G E T O P V IE W . . . 3.5 ns a tC L = 1 5 p F


    OCR Scan     		SN54S64, SN54S65, SN74S64, SN74S65 SN74S64 SN54S64 SN54S65 271 texas PDF

    74S64

    Abstract: 1N3064 1N916 74LS N74S64D N74S64N 74S64DC LS030
    Text: 74S64 Signetics Gate Four-Two-Three-Two-Input AND-OR-lnvert Gate Product Specification Logic Products TYPE T Y P IC A L PR O P A G A TIO N D E LA Y T Y P IC A L SU PP LY C U R R E N T T O T A L 3.5ns 8mA 74S 64 ORDERING CODE C O M M E R C IA L RA N G E P A C K A G ES


    OCR Scan     		74S64 74S64 10Sul N74S64N N74S64D 1N3064 1N916 74LS N74S64D N74S64N 74S64DC LS030 PDF

    Untitled

    Abstract: No abstract text available
    Text: NATIO NAL SEMICON D -CLOGIO D2E D | b5D112H 00b3?04 fi | T - t e - jr 64 C O N N E C T IO N D IA G R A M P IN O U T A 54S/74S64 4-2-3-2-INPUT A N D -O R -IN V E R T G A T E O R D E R IN G C O D E : Se e Section 9 P IN PKGS OUT C O M M E R C IA L G R A D E


    OCR Scan     		b5D112H 54S/74S64 74S64PC 74S64D 74S64FC 54S64DM 54/74S 54/74S PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74S64 4-WIDE AND-OR-INVERT GATES Description Pin Configuration This device contains two independent combinations of gates each of which performs the logic AND-ORINVERT function. Vcc D C B K J V Y = A B C D + E F + G H I+ J K Suffix-Blank: Plastic Dual In Line Package


    OCR Scan     		GD54/74S64 PDF

    54S64DM

    Abstract: 54S64FM 74S64DC 74S64FC 74S64PC
    Text: 64 C O N N E C T IO N D IA G R A M P IN O U T A 54S/74S64 4-2-3-2-IN PU T A ND-O R-INVERT GATE O R D E R IN G C O D E: See S e c tio n 9 PIN PKGS OUT C O M M E R C IA L G R A D E M ILITA R Y G RADE V c c = +5 .0 V ±5%, T a = 0 °C to + 70° C V c c = +5.0 V ±10%.


    OCR Scan     		54S/74S64 74S64PC 74S64DC 74S64FC 54S64DM 54S64FM 54/74S 54S64DM 54S64FM 74S64DC 74S64FC 74S64PC PDF

    logic symbol 74S64

    Abstract: No abstract text available
    Text: Signetics | 74S64 Gate Four-Two-Three-Two-Input AND-OR-lnvert Gate Product Specification Logic Products TYPE T Y P IC A L PR O P A G A TIO N D E LA Y T Y P IC A L SU PP LY C U R R E N T T O T A L 3.5ns 8m A 74S 64 ORDERING CODE C O M M E R C IA L RA N G E


    OCR Scan     		74S64 N74S64N 74S64D 10Sul WF07570S logic symbol 74S64 PDF

    Untitled

    Abstract: No abstract text available
    Text: 64 CO NNECTIO N DIAGRAM PINOUT A 54S/74S64 fc>//£^</4-2-3-2-INPUT AND-OR-INVERT GATE ORDERING CODE: See Section 9 PIN PKGS OUT 14] V c c E COMMERCIAL GRADE MILITARY GRADE V cc = +5.0 V ±5%, T a = 0 °C to +70° C V cc = +5.0 V ±10%, T a = -55° C to +125° C


    OCR Scan     		54S/74S64 74S64PC 74S64DC 74S64FC 54S64DM 54S64FM 54/74S 54/74S PDF

    74S64

    Abstract: 1N3064 1N916 74LS N74S64D N74S64N
    Text: Signetics 74S64 Gate Four-Two-Three-Two-Input AND-OR-lnvert Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 3.5ns 8mA 74S64 ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5% ; T a = 0°C to +70°C PACKAGES


    OCR Scan     		74S64 74S64 N74S64N N74S64D 10Sul 50/uA 1N3064 1N916 74LS N74S64D N74S64N PDF

    74S64

    Abstract: ScansUX1002
    Text: FAIRCHILD SUPER HIGH SPEED TTL/SSI • 9S64/54S64, 74S64 4-2-3-2-INPUT AND-OR-INVERT GATE SCH EM ATIC D IA G R A M LOGIC A N D CO NNECTION D IA G R A M DIP TOP VIEW R rniïn Fiiioi rn n i lEEEIEJEET P o s itiv e lo g ic : A B C D + EF + G H E + JK A ll in p u ts have S c h o ttk y c la m p d io d e s .


    OCR Scan     		9S64/54S64, 74S64 9S64XM/54S64XM 9S64XC/74S64XC ScansUX1002 PDF

    74S206

    Abstract: 74s201
    Text: 54/74S ELECTRICAL CHARACTERISTICS See Notes - Page 50 INPUT VOLTAGE V|L (V) PARAMETER TEST CONDITIONS LOW LEVEL VÇC~MIN MIN TYP MAX OUTPUT VOLTAGE V|C(V) V|H (V) HIGH LEVEL CLAMP VOLTAGE V çç= M IN VCC = “ IN l|=-18 mA MIN TYP MAX MIN TYP VOH (V) HIGH LEVEL


    OCR Scan     		54/74S 54/74S00 54/74S02 54/74S03 54/74S04 54/74S05 54/74S260 54/74S280 54/74S301 74S206 74s201 PDF

    MH1SS1

    Abstract: TESLA mh 7400 MH 7404 mh 7400 tesla cdb 838 tda 7851 L 741PC TDB0124DP tda 4100 TDA 7851 A
    Text: m ö lk ^ o e le l-c te n a n il-c Information Applikation RGW Typenübersicht Vergleich Teil 2: RGW M iM U Z A U l KÉD lnrüÖC=SraO Information Applikation HEFT 50 RGW Typenübersicht + Vergleich Teil 2: RGW wob Halbleiterwerk Frankfurt /oder bt r iab im v«b kombinat mikrootektronik


    OCR Scan     		PDF

    C350AVB

    Abstract: full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder
    Text: FUJITSU MICROELECTRONICS F U JIT S U wmmm 7flC D B 37MT7bH □D03c]4b 3 • JZ CMOS Gate Array GENERAL INFORMATION The Fujitsu CM O S gate array fam ily consists of tw en tyeight device types which are fabricated w ith advanced silicon gate CMOS technology. And more than 14 devices


    OCR Scan     		37MT7bH 74LS175 74LS181 74LS183 74LS190 74LS191 74LS192 74LS193 74LS194A 74LS195A C350AVB full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder PDF

    D 8243 HC

    Abstract: SO3A 6164 ram rb1-e N74S00 ITT301 N74S04 B177 55604A CD 5888
    Text: Signetics Integrated Circuits Schottky T T L Schottky T T L 74S Series Introduction S c h o ttk y T T L uses a d io d e cla m p design to ensure th e highest speed possible at T T L lo g ic levels ty p ic a lly 3ns gate p ro p a g a tio n de la y and 9 0 M H z f lip f lo p to g gle rate. H o w ever th e y rem ain c o m p a tib le w ith


    OCR Scan     		N74S00N 55376D N74S02N 55377B N74S03N 55378X N74S04N 55379R N74S05N 5380A D 8243 HC SO3A 6164 ram rb1-e N74S00 ITT301 N74S04 B177 55604A CD 5888 PDF

    ALU IC 74181

    Abstract: 74181 ic pin diagram DS 7409 7480 full adder 1 bit 74LS86 full adder IC 74181 7411 3 INPUT AND gate TTL 74ls83 pin diagram of 7411 logic diagram of 7432
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 Vcc Vcc 1^1FH [iä| [vii Eòi [T| r»1 füi Fai np f i ! Föi lyi rn


    OCR Scan     		54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, ALU IC 74181 74181 ic pin diagram DS 7409 7480 full adder 1 bit 74LS86 full adder IC 74181 7411 3 INPUT AND gate TTL 74ls83 pin diagram of 7411 logic diagram of 7432 PDF

    74ls gate symbols

    Abstract: 74LS series logic gate symbols 74LS series logic gates 74LS logic gates oc 44 74LS TTL series 74LS D-32 buffer 74ls series logic gates 74LS AND GATE
    Text: FAIRCHILD DIGITAL T T L Std. TTL 9N 54/74 10 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram<2 Item ~c g o c 3 li. Low Power Schottky 54LS/74LS 5 ns/2 mW Cont’d) 9000 Series 8 ns/10 mW SSI FUNCTIONS


    OCR Scan     		ns/10 54H/74H ns/22 54S/74S ns/19 54LS/74LS 74LS266 /74LS 74ls gate symbols 74LS series logic gate symbols 74LS series logic gates 74LS logic gates oc 44 74LS TTL series 74LS D-32 buffer 74ls series logic gates 74LS AND GATE PDF

    EATON CM20A

    Abstract: A5 GNE mosfet Hall sensor 44e 402 2N8491 FTG 1087 S TRIAC BCR 10km FEB3T smd transistor marking 352a sharp EIA 577 sharp color tv schematic diagram MP-130 M mh-ce 10268
    Text: Table of Contents N E W A R K E L E C T R O N IC S “Where serving you begins even before you call” Newark Electronics is a UNIQUE broadline distributor of electronic components, dedicated to provid­ ing complete service, fast delivery and in-depth inventory. Our main


    OCR Scan     		PDF

    itt 7441

    Abstract: transistor fcs 9012 7446 BCD to 7-segment Fairchild dtl catalog Truth Table 74192 7400 quad 2-input NAND gate truth-table 7449 BCD to 7-segment 7483 truth table Motorola Diode 54H01 semiconductors cross reference
    Text: TTL DATA BOOK Fairchild Semiconductor TTL Data Book Contents And Section Selector If you know the correct 5400, 7400, 9300 or 9600 device type number, find the correct page in the Numerical Index. If you are trying to choose the best device for your application, consult the


    OCR Scan     		APP-161 1-of-16 12-lnput itt 7441 transistor fcs 9012 7446 BCD to 7-segment Fairchild dtl catalog Truth Table 74192 7400 quad 2-input NAND gate truth-table 7449 BCD to 7-segment 7483 truth table Motorola Diode 54H01 semiconductors cross reference PDF

    SN74198N

    Abstract: DM74S00N DM74S03N DM74S04N DM74S05N DM74S10N DM74S11N
    Text: Sem iconductors N ational Sem iconductor Integrated Circuits - Digital T T L 74S Series T T L Ultra-High-Speed S e rie s'7 4 S Schottky T T L circuits are designed to achieve ultra-high sp e e d s previously obtainable only with emitter coupled logic, yet they retain the


    OCR Scan     		19mW-per-gate SN74200N SN74C200N 256-bit SN74198N SN74S198N SN74S251N SN74199N SN74S257N DM74S00N DM74S03N DM74S04N DM74S05N DM74S10N DM74S11N PDF

    dm8130

    Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
    Text: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408


    OCR Scan     		54H00 54L00 54LS00 54H01 54L01 54LS01 54L02 54LS02 54L03 54LS03 dm8130 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76 PDF

    DM74S00N

    Abstract: DM74S04N SN74160N DM74S03N DM74S05N DM74S10N DM74S11N 33072x
    Text: N ational Sem iconductor Sem iconductors Integrated Circuits - Digital T T L 74S Series T T L Ultra-High-Speed S e rie s'7 4 S Schottky T T L circuits are designed to achieve ultra-high sp e e d s previously obtainable only with emitter coupled logic, yet they retain the


    OCR Scan     		19mW-per-gate SN74S158N SN74160N SN74C160N SM74161N SM74S161N/SN74C161N SH74162N SN74C162N SM74163N SN74C163N DM74S00N DM74S04N DM74S03N DM74S05N DM74S10N DM74S11N 33072x PDF