74HC107 |
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Philips Semiconductors
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Dual JK flip-flop with reset negative-edge trigger |
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Original |
PDF
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74HC107D |
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Philips Semiconductors
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Dual JK flip-flop with reset negative-edge trigger |
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Original |
PDF
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74HC107D |
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Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
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Historical |
PDF
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74HC107D,652 |
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NXP Semiconductors
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Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 78 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT108-1 (SO14); Container: Bulk Pack, CECC |
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Original |
PDF
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74HC107D,653 |
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NXP Semiconductors
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Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 78 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT108-1 (SO14); Container: Reel Pack, SMD, 13", CECC |
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Original |
PDF
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74HC107DB |
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Philips Semiconductors
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Dual JK flip-flop with reset negative-edge trigger |
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Original |
PDF
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74HC107DB |
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Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
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Historical |
PDF
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74HC107DB,112 |
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NXP Semiconductors
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Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 78 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT337-1 (SSOP14); Container: Tube |
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Original |
PDF
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74HC107DB,118 |
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NXP Semiconductors
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Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 78 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT337-1 (SSOP14); Container: Reel Pack, SMD, 13" |
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Original |
PDF
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74HC107DB-T |
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Philips Semiconductors
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Dual JK flip-flop with reset negative-edge trigger |
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Original |
PDF
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74HC107DB-T |
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Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
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Historical |
PDF
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74HC107D-Q100 |
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NXP Semiconductors
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Dual JK flip-flop with reset; negative-edge trigger |
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Original |
PDF
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74HC107D-Q100J |
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NXP Semiconductors
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74HC107D-Q100 - 74HC107D-Q100 - Dual JK flip-flop with reset; negative-edge trigger |
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Original |
PDF
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74HC107D-T |
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Philips Semiconductors
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Dual JK flip-flop with reset negative-edge trigger |
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Original |
PDF
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74HC107D-T |
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Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
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Historical |
PDF
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74HC107DW |
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Philips Semiconductors
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Dual JK flip-flop with reset, negative-edge trigger |
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Original |
PDF
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74HC107N |
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Philips Semiconductors
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Dual JK flip-flop with reset negative-edge trigger |
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Original |
PDF
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74HC107N |
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Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
|
Historical |
PDF
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74HC107N,652 |
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NXP Semiconductors
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Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 78 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT27-1 (DIP14); Container: Bulk Pack, CECC |
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Original |
PDF
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74HC107PW |
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Philips Semiconductors
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Dual JK flip-flop with reset negative-edge trigger |
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Original |
PDF
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