PIC16C82X
Abstract: PIC16C820 microchip garage door opener PIC16C821 PIC16C822 200B PIC16CXX
Text: PIC16C82X EPROM/EEPROM 8-Bit Microcontroller Product Brief Pin Diagram Devices included: • PIC16C820 • PIC16C821 • PIC16C822 PDIP, SOIC, Windowed CERDIP Device EPROM Program EEPROM Data RAM Data PIC16C820 512 64 80 PIC16C821 1K 64 80 PIC16C822 2K 64
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PIC16C82X
PIC16C820
PIC16C821
PIC16C822
PIC16CXX
14-bit
DS30553A-page
PIC16C82X
PIC16C820
microchip garage door opener
PIC16C821
PIC16C822
200B
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H5111
Abstract: MD750-01A nec package label
Text: TUBE PACKING 1. CONTAINER Rubber stopper 2. INNER BOX L H Label W LABEL POSITION TOP OR SIDE OF BOX LABEL PRODUCT NAME, QUANTITY, LOT NUMBER, CLASS CONTAINER Applied Package 64-pin plastic shrink DIP 64-pin ceramic shrink DIP cerdip (window) Tube MD750-01A
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64-pin
MD750-01A
LB-010
SSD-A-H5111-2
H5111
MD750-01A
nec package label
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MD750-01A
Abstract: No abstract text available
Text: UNIT : mm 8.6 15.5 22.0 15.0 MD750-01A or LB-010 26.1 length : 495±2.0 thickness : 0.7 +0.3 −0.2 tolerance : ±0.4 material : plastic with antistatic finish Applied Package Quantity (pcs) 64-pin ⋅ plastic ⋅ shrink DIP MAX. 8 64-pin ⋅ ceramic ⋅ shrink DIP (cerdip) (window)
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MD750-01A
LB-010
64-pin
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cerdip
Abstract: MD750-01A
Text: TUBE CONTAINER UNIT : mm 8.6 15.5 22.0 15.0 MD750-01A or LB-010 26.1 length : 495±2.0 thickness : 0.7 +0.3 −0.2 tolerance : ±0.4 material : plastic with antistatic finish Applied Package Quantity (pcs) 64-pin ⋅ plastic ⋅ shrink DIP MAX. 8 64-pin ⋅ ceramic ⋅ shrink DIP (cerdip) (window)
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MD750-01A
LB-010
64-pin
SSD-A-H5109-2
cerdip
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Untitled
Abstract: No abstract text available
Text: IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4 and 64 x 5 IDT72404 are asynchronous high-performance First-ln/First-Out memories organized as 64 words by 5 bits. The IDT72403 and IDT72404 also have an Output Enable OE pin. The FlFOs accept 4-bit or 5-bit data at the data input
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IDT72401
IDT72402
IDT72403
IDT72404
IDT72404
IDT72403
IDT72402
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Untitled
Abstract: No abstract text available
Text: IDT72401 IDT72402 IDT72403 IDT72404 CMOS PARALLEL FIFO 64 x 4 and 64 x 5 IDT72404 are asynchronous high-performance First-ln/First-Out memories organized as 64 words by 5 bits. The IDT72403 and IDT72404 also have an Output Enable OE pin. The FlFOs accept 4-bit or 5-bit data at the data input
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IDT72401
IDT72402
IDT72403
IDT72404
IDT72401/72403)
IDT72402/72404)
175mW
45MHz
IDT72403/72404
MlL-STD-883,
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Untitled
Abstract: No abstract text available
Text: IDT72401 IDT72403 CMOS PARALLEL FIFO 64 x 4 and 64 x 5 FEATURES: • • • • • • • • • • • • • • • • • First-ln/First-Out memories organized 64 words by 4 bits. The IDT72403 also has an Output Enable OE pin. The FlFOs accept 4-bit data at the data input
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IDT72401
IDT72403
IDT72401/72403)
175mW
45MHz
IDT72403
MlL-STD-883,
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Untitled
Abstract: No abstract text available
Text: 64 PIN CERAMIC SHRINK DIP CERDIP (WINDOW) (750 mil) S 64 33 1 32 A K J I L C F H G D N M NOTES 1) Each lead centerline is located within 0.25 mm (0.010 inch) of its true position (T.P.) at maximum material condition. 2) Item "K" to center of leads when formed parallel.
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P64DW-70-750A1-1
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IDT72401
Abstract: IDT72403
Text: IDT72401 IDT72403 CMOS PARALLEL FIFO 64 x 4 and 64 x 5 FEATURES: • • • • • • • • • • • • • • • • has an Output Enable OE pin. The FlFOs accept 4-bit data at the data input (D0-D3). The stored data stack up on a first-in/first-out basis.
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IDT72401
IDT72403
SO16-1
MIL-STD-883,
IDT72401
IDT72403
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IDT72401
Abstract: IDT72403
Text: IDT72401 IDT72403 CMOS PARALLEL FIFO 64 x 4 FEATURES: • • • • • • • • • • • • • • • • • First-ln/First-Out memories organized 64 words by 4 bits. The IDT72403 also has an Output Enable OE pin. The FlFOs accept 4-bit data at the data input
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IDT72401
IDT72403
IDT72403
72401only
IDT72401
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IDT72401
Abstract: IDT72402 IDT72403 IDT72404
Text: CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Integrated Device Technology, Inc. FEATURES: First-ln/First-Out dual-port memory 64 x 4 organization IDT72401/03 64 x 5 organization (IDT72402/04) IDT72401/02 pin and functionally compatible with MMI67401/02 RAM-based FIFO with low fall-through time
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IDT72401
IDT72402
IDT72403
IDT72404
IDT72401/03)
IDT72402/04)
IDT72401/02
MMI67401/02
175mW
45MHz
IDT72404
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Untitled
Abstract: No abstract text available
Text: CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT FEATURES: • First-In/First-Out dual-port memory • 64 x 4 organization IDT72401/03 • 64 x 5 organization (IDT72402/04) • IDT72401/02 pin and functionally compatible with MM 167401/02 • RAM-based FIFO with low fall-through time
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IDT72401/03)
IDT72402/04)
IDT72401/02
175mW
45MHz
IDT72403/04
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2747D
Abstract: IDT72401 IDT72402 IDT72403 IDT72404 C2747 q2303
Text: INTEGRATED DEVICE M7 E D Hi >4025771 0 0 0 ^ ^ CMOS PARALLEL FIFO ' T 64 X 4-BIT AND 64 X 5-BIT Integrated Device Technology, Inc. FEATURES: First-In/First-Out dual-port memory 64 x 4 organization IDT72401/03 64 x 5 organization (IDT72402/04) IDT72401/02 pin ancf functionally compatible with
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IDT72401
IDT72402
IDT72403
IDT72404
IDT72401/03)
IDT72402/04)
IDT72401/02
MMI67401/02
175mW
45MHz
2747D
IDT72401
IDT72402
IDT72404
C2747
q2303
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Untitled
Abstract: No abstract text available
Text: CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT FEATURES: • • • • First-In/First-Out Dual-Port memory 64 x 4 organization IDT72401/03 64 x 5 organization (IDT72402/04) IDT72401 /02 pin arid functionally compatible with M M I67401/02 RAM-based FIFO with low fall-through time
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IDT72401
IDT72402
IDT72403
IDT72404
IDT72401/03)
IDT72402/04)
I67401/02
175mW
IDT72403/04
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Untitled
Abstract: No abstract text available
Text: M IT E L i s o 2*c m o s MT8960/61 /62/63/64/65/66/67 Integrated PCM Filter/Codec 9161-002-020-NA Features December 1992 Ordering Information • ST-BUS compatible MT8964/65AC 18 Pin Ceramic DIP MT8960/61 /64/65AE 18 Pin Plastic DIP MT8962/63AE 20 Pin Plastic DIP
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MT8960/61
9161-002-020-NA
MT8964/65AC
/64/65AE
MT8962/63AE
MT8962/63/66/67AS
11-Law:
MT8960/62/64/66
MT8961/63/65/67
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Untitled
Abstract: No abstract text available
Text: CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT FEATURES: • • • • • • • • • • • • • • • • • First-In/First-Out Dual-Port m em ory 64 x 4 organization IDT72401/03 64 x 5 organization (IDT72402/04) IDT72401/02 pin and functionally compatible with
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IDT72401/03)
IDT72402/04)
IDT72401/02
I67401/02
175mW
45MHz
IDT72403/04
IDT72401,
IDT72402,
IDT72403,
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Untitled
Abstract: No abstract text available
Text: WS27C210L Military 64 K x 16 CMOS EPROM KEY FEATURES Ultra-High Performance JEDEC Standard Pin Configuration — 120 ns Access Time — 40 Pin CERDIP Package — 44 Pin Leadless Chip Carrier CLLCC — 44 Pin Leaded Chip Carrier (CLDCC) DESC SMD No. 5962-86805
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WS27C210L
WS27C210L
WS27C210L-15LMB
WS27C210L-17CMB*
WS27C210L-17DMB*
MIL-STD-883C
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Untitled
Abstract: No abstract text available
Text: & 59C11 M icrochip IK 128 x 8 or 64 x 16 CMOS Serial Electrically Erasable PROM DESCRIPTION FEATURES Low power CMOS technology Pin selectable memory organization — 128 x 8 or 64 x 16 bit organization Single 5 volt only operation Self timed WRITE, ERAL and WRAL cycles
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59C11
59C11
DS20040E-7
59C11T
DS20040E-8
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BSY76
Abstract: No abstract text available
Text: & 59C11 Microchip IK 128 x 8 or 64 x 16 CMOS Serial Electrically Erasable PROM FEATURES DESCRIPTION • Low power CMOS technology • Pin selectable memory organization — 128 x 8 or 64 x 16 bit organization • Single 5 volt only operation • Self timed WRITE, ERAL and WRAL cycles
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59C11
59C11
DS20040F-page
MCHPD001
59C11T
BSY76
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Untitled
Abstract: No abstract text available
Text: & 59C11 M icrochip IK 128 x 8 or 64 x 16 CMOS Serial Electrically Erasable PROM FEATURES DESCRIPTION • Low power CMOS technology • Pin selectable memory organization — 128 x 8 or 64 x 16 bit organization • Single 5 volt only operation • Self timed WRITE, ERAL and WRAL cycles
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59C11
59C11
128x8
DS20040F-page
59C11T
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Untitled
Abstract: No abstract text available
Text: 4B2S771 □ D2 b 3 ö i 4 T 7D CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Output Enable OE pin. The FIFOs accept 4-bit or 5-bit data at the data input (Do-D3,4 ). The stored data stack up on a firstin/first-out basis. A Shift Out (SO) signal causes the data at the next to last
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4B2S771
1O-S36-MT0
MS-013,
D02b3Ã
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Untitled
Abstract: No abstract text available
Text: CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT FEATURES: • • • • • • • • • • • • • • • • • IDT72401 IDT72402 IDT72403 IDT72404 O utput Enable QE pin. The FIFOs accept 4-bit or 5-bit data at the data input (Do-D3,4). The stored data stack up on a firstin/first-out basis.
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IDT72401
IDT72402
IDT72403
IDT72404
IDT72401/03)
IDT72402/04)
IDT72401/02
I67401/02
175mW
45MHz
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Untitled
Abstract: No abstract text available
Text: ^ S u p e r t e x in c . O c ta l Bus Transceivers w i t h 3-State O u tp u ts Ordering Information Package Com m ercial 74 H C T M ilitary 64 H C T M ilitary Hi-Rel RB 54H C T N/A N/A 20-pin plastic DIP 74H CT245P 20-pin CERDIP 74HCT245D 54H CT245D RB54HCT245D
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20-pin
CT245P
74HCT245D
CT245C
CT245LC
CT245D
54HCT245C
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p15c
Abstract: AMD29510 68-LCC d 5287 LA 7522 L64012 TDC1010 Z3P28 P21c
Text: L64010 L64011 L64Q12 16-Brt HCMOS Multiplier-Accumulators L S I The L64010 replicates industry standard functionality and pinout for a 64-pin DIP package. It includes a full product register preload feature. Description The L64011 replicates industry standard functionality
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L64010
L64011
L64012
16-Bit
64-pin
L64012
68-pin
p15c
AMD29510
68-LCC
d 5287
LA 7522
TDC1010
Z3P28
P21c
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