74LVC38A
Abstract: 74LVC38AD 74LVC38ADB 74LVC38APW
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC38A Quad 2-input NAND gate open drain Product specification 2002 Apr 08 Philips Semiconductors Product specification Quad 2-input NAND gate (open drain) 74LVC38A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic
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74LVC38A
74LVC38A
SCA74
613508/01/pp16
74LVC38AD
74LVC38ADB
74LVC38APW
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Octal Latches open collector
Abstract: DM74ALS20A DM74ALS00A DM74ALS02 DM74ALS03B DM74ALS04B DM74ALS05A DM74ALS08 DM74ALS09 DM74ALS10A
Text: Logic Products by Family Bipolar-ALS Products Logic Product Function Product Description Package Voltage Node DM74ALS00A Gate Quad 2-Input NAND Gates DIP SOIC SOP 5 DM74ALS02 Gate Quad 2-Input NOR Gates DIP SOIC SOP 5 DM74ALS03B Gate Quad 2-Input NAND Gates with Open Collector Outputs
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DM74ALS00A
DM74ALS02
DM74ALS03B
DM74ALS04B
DM74ALS05A
DM74ALS08
DM74ALS09
DM74ALS10A
DM74ALS1000A
DM74ALS1004
Octal Latches open collector
DM74ALS20A
DM74ALS00A
DM74ALS02
DM74ALS03B
DM74ALS04B
DM74ALS05A
DM74ALS08
DM74ALS09
DM74ALS10A
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74LVC00A
Abstract: 74LVC00AD 74LVC00ADB 74LVC00APW
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 1998 Apr 28 2002 Mar 05 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic
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74LVC00A
74LVC00A
SCA74
613508/03/pp16
74LVC00AD
74LVC00ADB
74LVC00APW
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74LVC00A
Abstract: 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW DHVQFN14 SSOP14 TSSOP14 dhvqfn14 footprint
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 2002 Mar 05 2003 May 07 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic
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74LVC00A
74LVC00A
SCA75
613508/04/pp20
74LVC00ABQ
74LVC00AD
74LVC00ADB
74LVC00APW
DHVQFN14
SSOP14
TSSOP14
dhvqfn14 footprint
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cmos nand gate open collector
Abstract: ttl nand gate 74LVQ00 TTL NOR Gate 74F00 series logic family nand gate NC7SZ332 cd4023bc TTL nand logic gate nand
Text: Logic Products by Function Gate Products Logic Product Family Product Description Package Voltage Node 74AC00 FACT Quad 2-Input NAND Gate DIP SOIC SOP TSSOP 3.3 5 74ACT00 FACT ACT Quad 2-Input NAND Gate DIP SOIC SOP TSSOP 5 74ACTQ00 FACT Quiet Series (ACTQ)
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74AC00
74ACT00
74ACTQ00
74ALVC00
74F00
74LCX00
74LVQ00
CD4011BC
CD4019BC
CD4023BC
cmos nand gate open collector
ttl nand gate
74LVQ00
TTL NOR Gate
74F00 series logic family
nand gate
NC7SZ332
cd4023bc
TTL nand
logic gate nand
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74LVC00A
Abstract: 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW SSOP14 TSSOP14
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 2003 May 07 2003 Sep 04 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic
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74LVC00A
74LVC00A
SCA75
R20/05/pp15
74LVC00ABQ
74LVC00AD
74LVC00ADB
74LVC00APW
SSOP14
TSSOP14
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74aup2g00dc
Abstract: No abstract text available
Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 8 — 5 February 2013 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP2G00
74AUP2G00
74aup2g00dc
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Untitled
Abstract: No abstract text available
Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 5 — 16 March 2012 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP1G00
74AUP1G00
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74AUP2G00DC
Abstract: 74AUP2G00 74AUP2G00GD 74AUP2G00GT JESD22-A114E JESD78
Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 04 — 5 June 2008 Product data sheet 1. General description The 74AUP2G00 provides the dual 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP2G00
74AUP2G00
74AUP2G00DC
74AUP2G00GD
74AUP2G00GT
JESD22-A114E
JESD78
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74AUP2G00DC
Abstract: 74AUP2G00 74AUP2G00GT JESD78
Text: 74AUP2G00 Low-power dual 2-input NAND gate Rev. 5 — 21 October 2010 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
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74AUP2G00
74AUP2G00
74AUP2G00DC
74AUP2G00GT
JESD78
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74LVC38A
Abstract: 74LVC38ABQ 74LVC38AD 74LVC38ADB 74LVC38APW DHVQFN14 SSOP14 TSSOP14
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC38A Quad 2-input NAND gate open drain Product specification Supersedes data of 2004 Mar 10 2004 Mar 22 Philips Semiconductors Product specification Quad 2-input NAND gate (open drain) 74LVC38A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic
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74LVC38A
74LVC38A
SCA76
R20/03/pp14
74LVC38ABQ
74LVC38AD
74LVC38ADB
74LVC38APW
DHVQFN14
SSOP14
TSSOP14
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Untitled
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC38A Quad 2-input NAND gate open drain Product specification Supersedes data of 2002 Apr 08 2004 Mar 10 Philips Semiconductors Product specification Quad 2-input NAND gate (open drain) 74LVC38A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic
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74LVC38A
74LVC38A
SCA76
R20/02/pp14
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Untitled
Abstract: No abstract text available
Text: IDT74LVC38A 3.3V CMOS QUAD 2-INPUT NAND GATE OPEN DRAIN EXTENDED COMMERCIAL TEMPERATURE RANGE IDT74LVC38A ADVANCE INFORMATION 3.3V CMOS QUAD 2-INPUT NAND GATE (OPEN DRAIN) WITH 5 VOLT TOLERANT I/O DESCRIPTION FEATURES: – – 0.5 MICRON CMOS Technology
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IDT74LVC38A
MIL-STD-883,
200pF,
DT74LVC38A
SO14-1)
SO14-2)
SO14-3)
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74LVC1G00
Abstract: 74LVC1G00GF 74LVC1G00GM 74LVC1G00GV 74LVC1G00GW JESD22-A114E
Text: 74LVC1G00 Single 2-input NAND gate Rev. 07 — 17 July 2007 Product data sheet 1. General description The 74LVC1G00 provides the single 2-input NAND function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
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74LVC1G00
74LVC1G00
74LVC1G00GF
74LVC1G00GM
74LVC1G00GV
74LVC1G00GW
JESD22-A114E
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Untitled
Abstract: No abstract text available
Text: 74LVC1G00-Q100 Single 2-input NAND gate Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74LVC1G00-Q100 provides the single 2-input NAND function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
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74LVC1G00-Q100
74LVC1G00-Q100
automo11
74LVC1G00
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74LVC1G00
Abstract: 74LVC1G00GF 74LVC1G00GM 74LVC1G00GV 74LVC1G00GW NXP 74LVC1G00GW
Text: 74LVC1G00 Single 2-input NAND gate Rev. 8 — 20 October 2010 Product data sheet 1. General description The 74LVC1G00 provides the single 2-input NAND function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
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74LVC1G00
74LVC1G00
74LVC1G00GF
74LVC1G00GM
74LVC1G00GV
74LVC1G00GW
NXP 74LVC1G00GW
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Untitled
Abstract: No abstract text available
Text: 74LVC1G00 Single 2-input NAND gate Rev. 10 — 2 July 2012 Product data sheet 1. General description The 74LVC1G00 provides the single 2-input NAND function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
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74LVC1G00
74LVC1G00
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Untitled
Abstract: No abstract text available
Text: 74LVC1G00-Q100 Single 2-input NAND gate Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74LVC1G00-Q100 provides the single 2-input NAND function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
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74LVC1G00-Q100
74LVC1G00-Q100
74LVC1G00
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Untitled
Abstract: No abstract text available
Text: 74LVC1G00 Single 2-input NAND gate Rev. 9 — 7 December 2011 Product data sheet 1. General description The 74LVC1G00 provides the single 2-input NAND function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
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74LVC1G00
74LVC1G00
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U74AHC1G00
Abstract: U74AHC1G00-AF5-R U74AHC1G00-AL5-R U74AHC1G00L-AF5-R
Text: UNISONIC TECHNOLOGIES CO., LTD U74AHC1G00 CMOS IC 2-INPUT NAND GATE 3 2 1 5 DESCRIPTION 4 The U74AHC1G00 is a 2-input NAND gate which provides the Function Y=A*B . SOT-25 3 2 1 FEATURES 5 * Operation Voltage Range: 2~5.5V * Low Power Dissipation: ICC=1.0µA Max
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U74AHC1G00
U74AHC1G00
OT-25
OT-353
U74AHC1G00L
U74AHC1G00-AF5-R
U74AHC1G00L-AF5-R
U74AHC1G00-AL5-R
U74AHC1G00L-AL5-R
U74AHC1G00-AF5-R
U74AHC1G00-AL5-R
U74AHC1G00L-AF5-R
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cmos ic 4584
Abstract: CMOS 4584 CI 4584 lvc10a
Text: IDT74LVC10A 3.3V CMOS TRIPLE 3-INPUT POSITIVE-NAND GATE EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS TRIPLE 3-INPUT POSITIVE-NAND GATE WITH 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: – – 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015;
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IDT74LVC10A
MIL-STD-883,
200pF,
SO14-1)
SO14-2)
SO14-3)
cmos ic 4584
CMOS 4584
CI 4584
lvc10a
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LVC00A
Abstract: IDT74LVC00A
Text: IDT74LVC00A 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE WITH 5 VOLT TOLERANT I/O DESCRIPTION FEATURES: – – – – – – – – – – IDT74LVC00A ADVANCE INFORMATION
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IDT74LVC00A
MIL-STD-883,
200pF,
LVC00A
IDT74LVC00A
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Untitled
Abstract: No abstract text available
Text: Digital Circuits RAY I and II Series T T L Cont. Type1 Number Description RF9601 Retriggerable monostable multivibrator RF9602 (-5 5°C to +125°C) Retriggerable monostable multivibrator (0°C to +75°C) Dual 4 input NAND gate Dual 4 input NAND gate Dual 4 input N AN D gate
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OCR Scan
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RF9601
15/gate
RF9602
30/gate
RG100
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HEF4011BP
Abstract: hef4011
Text: HEF4011B gates QUADRUPLE 2-INPUT NAND GATE The HEF4011B provides the positive quadruple 2-input NAND function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. JIUT?LJ^_iWLJoUilJT1 1 2 12 5 13 VqD ^8
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HEF4011B
HEF4011B
HEF4011BP
14-lead
OT27-1)
HEF4011BD
HEF4011
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