SY58021U
Abstract: SY89854U SY89854UMG SY89854UMGTR
Text: SY89854U Precision Low Power 1:4 LVPECL Fanout Buffer/Translator with Internal Termination General Description The SY89854U is a 2.5V/3.3V precision, highspeed, fully differential 1:4 LVPECL fanout buffer. Optimized to provide four identical output copies
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SY89854U
SY89854U
100mV
200mVpp)
M9999-022007-B
SY58021U
SY89854UMG
SY89854UMGTR
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SY58028U
Abstract: SY58029U SY58030U SY58030UMG SY58030UMGTR SY58030UMI SY58030UMITR
Text: Precision Edge ULTRA PRECISION, 400mV SY58030U ® DIFFERENTIAL LVPECL 4:1 MUX with 1:2 Precision Edge SY58030U FANOUT and INTERNAL TERMINATION Micrel, Inc. FEATURES Selects 1 of 4 differential inputs Provides two copies of the selected input Guaranteed AC performance over temperature and
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400mV
SY58030U
340ps
10psPP
100mV
M9999-020707
SY58028U
SY58029U
SY58030U
SY58030UMG
SY58030UMGTR
SY58030UMI
SY58030UMITR
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DL140
Abstract: MC100EL05 MC100LVEL05 LVEL05
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 2ĆInput Differential AND/NAND MC100LVEL05 The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3V supply voltage. With propagation delays and output transition
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MC100LVEL05
MC100LVEL05
MC100EL05
LVEL05
340ps
DL140
MC100LVEL05/D
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Untitled
Abstract: No abstract text available
Text: Low phase noise, Dual 1-to-6, 3.3V, 2.5V LVPECL Output Fanout Buffer IDT8SLVP2106I DATASHEET General Description Features The IDT8SLVP2106I is a high-performance differential dual 1:6 LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.
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IDT8SLVP2106I
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ICS951601
Abstract: No abstract text available
Text: ICS951601 Integrated Circuit Systems, Inc. Preliminary Product Preview General Purpose Frequency Timing Generator Recommended Application: General Purpose Clock Generator Output Features: • 17 - PCI clocks selectable, either 33.33MHz or 66.6MHz @ 3.3V • 1 - 48MHz @ 3.3V
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ICS951601
33MHz
48MHz
318MHz.
318MHz
33MHz:
170ps
66MHz:
340ps
ICS951601
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ICS951601
Abstract: No abstract text available
Text: ICS951601 Integrated Circuit Systems, Inc. Preliminary Product Preview General Purpose Frequency Timing Generator Key Specifications: • PCI – PCI output skew within same bank @ 33MHz: <170ps Output Features: • 17 - PCI clocks selectable, either 33.33MHz or 66.6MHz @ 3.3V
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ICS951601
33MHz:
170ps
33MHz
48MHz
318MHz.
66MHz:
340ps
200ps
ICS951601
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Untitled
Abstract: No abstract text available
Text: Precision Edge ULTRA PRECISION, 400mV SY58030U ® DIFFERENTIAL LVPECL 4:1 MUX with 1:2 Precision Edge SY58030U FANOUT and INTERNAL TERMINATION Micrel, Inc. FEATURES • Selects 1 of 4 differential inputs ■ Provides two copies of the selected input ■ Guaranteed AC performance over temperature and
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400mV
SY58030U
340ps
10psPP
100mV
M9999-072205
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W83195CG
Abstract: W83195CG-920
Text: W83195CG-920 Winbond Clock Generator with DDR I/II Buffer For VIA P4 Series Chipset Date: Apr/10/2006 Revision: 0.6 W83195CG-920 CLOCK GEN. with DDRI/II Buffer For VIA P4 SERIES CHIPSET W83195CG-920 Data Sheet Revision History PAGES DATES VERSION WEB VERSION
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W83195CG-920
Apr/10/2006
W83195CG-920
W83195CG
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PD65625
Abstract: PD65654 V30MZC PD65808 V30MX PD65875 PD65842 PD65841 CMOS-N5 PD65802
Text: CD-ROM版セミカスタム IC CD-ROM X13769XJ2V0CD00 05−1 セミカスタム IC NECのASIC • ASICとは？（1/2） LSIは大きく，汎用LSIと特定用途向けLSI （ASIC：Application Specific IC） とに分けられます。 汎用LSIは， メーカ側で独自に設計し標準のLSIとして市販されているLSIです。各ユーザの使用量は少なくても大
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X13769XJ2V0CD00
PD681×
114ps
169ps
864ps
35mASIC
10GHz,
PD65625
PD65654
V30MZC
PD65808
V30MX
PD65875
PD65842
PD65841
CMOS-N5
PD65802
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Untitled
Abstract: No abstract text available
Text: SY89851U Low Power, 3GHz, 1:2 LVPECL Fanout Buffer/Translator with Internal Termination General Description The SY89851U is a low jitter, low skew, high-speed 1:2 differential fanout buffer optimized for precision telecom and enterprise server distribution
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SY89851U
SY89851U
100mV
200mVpp)
800mV,
100Kcompatible
M9999-071205
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Untitled
Abstract: No abstract text available
Text: SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, highspeed, 2:1 differential MUX capable of handling clocks up to 2.5GHz and data streams up to 2.5Gbps. The differential input includes Micrel’s unique, patent
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SY89852U
SY89852U
100mV
200mVpp)
800mV
180ps.
M9999-082907-C
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Untitled
Abstract: No abstract text available
Text: SY89854U Precision Low Power 1:4 LVPECL Fanout Buffer/Translator with Internal Termination General Description The SY89854U is a 2.5V/3.3V precision, highspeed, fully differential 1:4 LVPECL fanout buffer. Optimized to provide four identical output copies
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SY89854U
SY89854U
100mV
200mVpp)
M9999-022405
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Untitled
Abstract: No abstract text available
Text: SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, highspeed, 2:1 differential MUX capable of handling clocks up to 2.5GHz and data streams up to 2.5Gbps. The differential input includes Micrel’s unique, patent
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SY89852U
SY89852U
100mV
200mVpp)
800mV
180ps.
M9999-110304
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48MHZ
Abstract: 72MHZ SEL24 W83194BR-PT
Text: W83194BR-PT WINBOND STEPLESS VIA PT MAIN CLOCK GENERATOR -I- Publication Release Date:April 13, 2005 Revision 1.1 W83194BR-PT Table of Contents1. GENERAL DESCRIPTION . 1
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W83194BR-PT
48MHZ
72MHZ
SEL24
W83194BR-PT
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Untitled
Abstract: No abstract text available
Text: 19-2542; Rev 0; 7/02 1:5 Clock Driver with Selectable LVPECL Inputs/Single-Ended Inputs and LVDS Outputs The MAX9310A is a fast, low-skew 1:5 differential driver with selectable LVPECL inputs and LVDS outputs, designed for clock distribution applications. This device
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MAX9310A
340ps
MAX9310A
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SY58021U
Abstract: SY89854U SY89854UMG SY89854UMGTR
Text: SY89854U Precision Low Power 1:4 LVPECL Fanout Buffer/Translator with Internal Termination General Description The SY89854U is a 2.5V/3.3V precision, highspeed, fully differential 1:4 LVPECL fanout buffer. Optimized to provide four identical output copies
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SY89854U
SY89854U
100mV
200mVpp)
M9999-082907-C
SY58021U
SY89854UMG
SY89854UMGTR
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W83195BR-341
Abstract: SEL24 W83195BG-341 SA5861
Text: W83195BR-341 W83195BG-341 WINBOND CLOCK GENERATOR FOR VIA P4/KT SERIES CHIPSET Date: Mar/21/2006 Revision: 1.1 W83195BR-341/W83195BG-341 CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET W83195BR-341/W83195BG-341 Data Sheet Revision History PAGES DATES VERSION WEB VERSION
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W83195BR-341
W83195BG-341
Mar/21/2006
W83195BR-341/W83195BG-341
W83195BR-341/W83195BG-341
W83195BR-341
SEL24
W83195BG-341
SA5861
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W83194BR
Abstract: DD48 SEL24 W83194BR-372 Analog devices TOP marking Information ref0
Text: W83194BR-372 WINBOND CLOCK GENERATOR FOR SIS 746/748 CHIPSETS -I- Publication Release Date: December 28, 2004 Revision 1.0 W83194BR-372 Revision History PAGES DATES VERSION WEB VERSION MAIN CONTENTS All of the versions before 0.50 are for internal use. 1 2
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W83194BR-372
W83194BR
DD48
SEL24
W83194BR-372
Analog devices TOP marking Information ref0
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M9999-071205
Abstract: No abstract text available
Text: SY89851U Low Power, 3GHz, 1:2 LVPECL Fanout Buffer/Translator with Internal Termination General Description The SY89851U is a low jitter, low skew, high-speed 1:2 differential fanout buffer optimized for precision telecom and enterprise server distribution
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SY89851U
SY89851U
100mV
200mVpp)
800mV,
100Kcompatible
M9999-071205
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W83195CG
Abstract: W83195CG-920 DSA0091627
Text: W83195CG-920 Winbond Clock Generator with DDR I/II Buffer For VIA P4 Series Chipset Date: Apr/10/2006 Revision: 0.6 W83195CG-920 CLOCK GEN. with DDRI/II Buffer For VIA P4 SERIES CHIPSET W83195CG-920 Data Sheet Revision History PAGES DATES VERSION WEB VERSION
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W83195CG-920
Apr/10/2006
W83195CG-920
W83195CG
DSA0091627
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w83194br
Abstract: No abstract text available
Text: W83194BR-903 & W83194BG-903 STEPLESS VIA PT/PM MAIN CLOCK GENERATOR Date: 5/2/2006 Revision: 1.0 W83194BR-903/W83194BG-903 W83194BR-903 Datasheet Revision History PAGES DATES VERSION WEB VERSION MAIN CONTENTS n.a. All of the versions before 0.50 are for internal
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W83194BR-903
W83194BG-903
W83194BR-903/W83194BG-903
W83194BR-903
w83194br
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TC160G
Abstract: toshiba LGA Nand TC170C14 TC26SC TC170C1 TC170C29
Text: TOSHIBA TC170C CMOS Standard Cell 0.7\xm , 5.0V ASICs The 0.7nm, 5V TC170C allows higher area efficiency, system performance and device integration with lower power than previous generation 5V standard cell products Benefits • Advanced 0.7 micron CMOS process with fast 250ps gate
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TC170C
250ps
TC160G
toshiba LGA Nand
TC170C14
TC26SC
TC170C1
TC170C29
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pmi op50
Abstract: ic PMI OP50 OP-50 OP-50AY OP-50EY OP50 0P-50
Text: High-Output-Current Operational Amplifier A^ > 5 0P-50 ANALOG DEVICES □ FEATU RES • Open-Loop G a in . . . 10.000.000V/V Min • Low Input onset Voltage _ . 25MV Max • Low Input Mas Current. • ExeeHent TCVo«. .Q.3*iV/°C Max
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0P-50
00V/V
14-PIN
OP-50
130ft
047pF
pmi op50
ic PMI OP50
OP-50AY
OP-50EY
OP50
0P-50
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 2 -ln p u t D iffe re n tia l A N D /N A N D M C 100LVEL05 The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3V supply voltage. With propagation delays and output transition
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100LVEL05
MC100LVEL05
MC100EL05
LVEL05
340ps
75kyer.
MC100LVEL05/D
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