Untitled
Abstract: No abstract text available
Text: M IL -M -3 8 5 1 0 /2 8 9 4 DECEMBER 1986 M IL IT A RY S P E C IF IC A T IO N M IC RO C IR C U IT S , D I G I T A L , CMOS 4096 B I T S T A T IC RANDOM ACCESS MEMORY RAM MONOLITHIC S IL IC O N T h is s p e c if ic a t io n i s me n ts and A g e n c i e s
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MIL-M-38510/289
4096-bit
MIL-M-38510
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Untitled
Abstract: No abstract text available
Text: LOGIC DEVICES INC 8K X 8 Static RAM 2bE D Low Power FEATURES • 55L.5Ì05 aOGlG3b 7 ■ L 7 C 1 8 5 / L 7 C L 1 8 5 DESCRIPTION 'T ¥ ¿ - 2 3 -/1 li data may be retained in inactive stor The L7C185 and L7CL185 are highperformance, low-power CMOS static age with a supply voltage as low as
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L7C185
L7CL185
L7CL185
L7CL185UO
L7C185KM
L7CL185KM
L7C185TME
L7CL185TME
L7C185KMB
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7027a
Abstract: 7M206 7027-A
Text: Integrated Device Technology* Inc. 8K X 9 & 16K X 9 CEMOS PARALLEL IN-OUT FIFO MODULE FEATURES: • • • • • • • • • • • First-In/First-Out memory module 8K x 9 organization IDT7M205S 16K x 9 organization (1DT7M206S) High speed: 20ns (max.) access time
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IDT7M205S
IDT7M206S
IDT7M205S)
1DT7M206S)
205S/206Sare
IDT7203
IDT7204
1DT7M205S/206S
8K/16K
MIL-STD-883,
7027a
7M206
7027-A
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7202A
Abstract: No abstract text available
Text: M OSEL V ITEU C MS7200U7201AL/7202AL 256x9,512x9, 1Kx9 CMOS FIFO Features Descriptions • First-In/First-Out static RAM based dual port memory ■ Three densities in a x9 configuration ■ Low power versions ■ Includes empty, full, and half full status flags
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MS7200U7201AL/7202AL
256x9
512x9,
MS7200L/7201AL/7202AL
MS7200-25NC
MS7200-25JC
MS7200-25FC
MS7200-35NQ
MS7200-35JC
MS7200-35FC
7202A
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M2114A
Abstract: M2148H
Text: in t e i M2148H HIGH SPEED 1024 x 4 BIT STATIC RAM M ilitary M2148H-3 M2148H Max. Access Time ns 55 70 Max. Active Current (mA) 180 180 Max. Standby Current (mA) 30 30 HMOS III Technology High Density 18-Pin Package Completely Static Memory — No Clock
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M2148H
M2148H-3
18-Pin
M2114A
M2148H
4096-bit
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CMOS 4000B series device
Abstract: DAC87H-CBI-V MIL-STD-863 2010 DAC85 DAC87 DAC87H DAC85H DAC85H-CBI-V DAC85H-CBI-V-BI
Text: DAC85H DAC87H B U R R -B R O W N I B S ] MILITARY VERSION AVAILABLE DESCRIPTION T hese m onolithic digital-to-analog converters are p in-for-pin eq u ivalent to the in d u stry sta n d ard DAC85 and DA C87 first introduced by B urr-B row n. T heir single-chip design includes the ou tp u t am plifier
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DAC85H
DAC87H
12-Bit
DAC85
DAC87
1200ft
255ft
1455ft.
CMOS 4000B series device
DAC87H-CBI-V
MIL-STD-863 2010
DAC87H
DAC85H-CBI-V
DAC85H-CBI-V-BI
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33AO
Abstract: No abstract text available
Text: ss CY7C170A B>'ss c y p r e s s SEMICONDUCTOR — 4096 x 4 Static RAV RAM Features Functional Description • CMOS for optimum speed/power The CY7C170A is a high-performance CMOS static RAM organized as 4096 words by 4 bits. Easy memory expansion is provided by an active LOW chip select
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CY7C170A
CY7C170A
chi170A
20KMB
CY7C170A--
CY7C170A-25VC
25DMB
CY7C170A-25KMB
33AO
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Untitled
Abstract: No abstract text available
Text: CYM1400 ' — 32K x 8 SRAM Module PRELIMINARY CYPRESS SEMICONDUCTOR Features Functional Description • Very high speed 256K SRAM module T he C Y M 1400 is an extremely high performance 256-kilobit static RAM module organized as 32,768 words by 8 bits. This module is constructed using
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300-mil-wide
7C199
CYM1400
CYM1400HD-10C
CYM1400HD-12C
CYM1400HD-12MB
CYM1400HD-15C
CYM1400HD-15MB
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Untitled
Abstract: No abstract text available
Text: ju t 16 » » SM61664 1MBit 64Kx 16 CMOS SRAM Module General Description Features The SM61664 is a high performance, 1-megabit static RAM module organized as 64K words by 16 bits, in a 40-pin, dual-in-line (DIP) package. The module utilizes four 64 K x 4 static RAMs in surface mount package on
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SM61664
40-pin,
64Kxl6,
128Kx8
256Kx4
900-mil
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Untitled
Abstract: No abstract text available
Text: L7C106 256K x 4 Static RAM FEATURES 3 DESCRIPTION □ 256K x 4 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 17 ns maximum □ Low Power Operation Active: 400 mW typical at 25 ns
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L7C106
L7C106
255ft
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Untitled
Abstract: No abstract text available
Text: HM62932 Series Preliminary 32,768-Word x 9-Bit High Speed CMOS Static Ram • FEATURES • High speed: fast access tim e 15/20 ns max • Low Power Standby: 15|iW (typ.) (L-version) Operation: 350mW (typ.) • Single 5V supply • Com pletely static memory
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HM62932
768-Word
350mW
62932JP-15
62932JP-20
62932LJP-15
62932LJP-20
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Untitled
Abstract: No abstract text available
Text: 9 Megabit CMOS SRAM DPS256S36L M ICRO SYSTEM S PRELIMINARY DESCRIPTION: The DPS256S36L is a 256K X 36 high-density, Iow-power static RAM module comprised of eight 128K X 9 monolithic SRAM's, an advanced high-speed CMOS decoder, resistor network and decoupling capacitors
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DPS256S36L
DPS256S36L
512Kx
256Kx36
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1720P
Abstract: 1720-20
Text: p yp: v « *1 X X CYM1720 - 32K x 24 Static RAM Module constructed using three 32K x 8 static RAMs in SOJ packages mounted onto an epoxy laminate board with pins. Features • High-density 768-kilobit SRAM module • High-speed CMOS SRAMs Writing to the device is accomplished when the chip select
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CYM1720
1720P
1720-20
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Untitled
Abstract: No abstract text available
Text: September 1990 Editor 2.0 FUJITSU DATA SHEET MB82B001-25/-35 1M-BIT HIGH-SPEED BiCMOS SRAM 1M Words x 1 Bit High-Speed BiCMOS Static Random Access Memory The Fujitsu MB82B001 is a 1,048,576 words x 1 bit static random access memory fabricated with a BiCMOS process technology. For lower power dissipation and higher
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MB82B001-25/-35
MB82B001
MB82B001-25
MB82B001-35
C-28P-M
C280S5S-1C
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ZZZ3
Abstract: No abstract text available
Text: PARADIGM 256K Static RAM 64K x 4-Bit PDM41258SA PDM41258LA Features Description □ High speed access times Com'l: 1 0 ,1 2 ,1 5 ,2 0 and 25ns M il: 12,15, 20,2 5 ,3 5 ,4 5 , and 55ns □ Low power operation - PDM41258SA Active: 400mW typ. Standby: 150 mW (typ.)
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PDM41258SA
400mW
PDM41258LA
350mW
MIL-STD-883,
PDM41258LA
PDM41258
IPDM41258SA
ZZZ3
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Untitled
Abstract: No abstract text available
Text: Features • TTL/LVTTL-compatible, three-state I/O • Organization: 1 3 1 ,0 7 2 words x 8 bits • High speed • • • • - 1 0 / 1 2 / 1 5 / 2 0 ns address access tim e - 3 /3 /4 Z 5 ns output enable access time Low pow er consum ption available - Active:
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32-pin
CI024-
AS7C31024-10JC
-12jC
1024L
S7C31024-12TC
AS7C31024L-12TC
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Untitled
Abstract: No abstract text available
Text: LO GI C D E V I C E S INC 32K X 8 Static RAM FEATURES □ 32K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 15 ns maximum Q Low Power Operation Active: 380 mW typical at 45 ns
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L7C199)
L7CL199)
IDT71256,
CY7C198/199
28-pin
32-pin
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Untitled
Abstract: No abstract text available
Text: 512K 64K X 8 SYNCHRONOUS STATIC RAM PLASTIC SIP MODULE FEATURES: • • • • • • • • • 64K x 8 fully synchronous memory High-speed-20M Hz read cycle time 16-bit synchronous address input 8-bit synchronous data input Synchronous chip select and write enable
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High-speed-20M
16-bit
43-pln
7MP6025
IDT7MP6025
be025
255ft
S13-194
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7c1041
Abstract: CY7C1041
Text: PRELIMINARY CY7C1041 25 6Kx 16 Static RAM written into the location specified on t he address pins A0 through A-|7 . If byte high enable (BHE) is LOW, then datafrom I/O pins ( l/0 8through I/0 15) is written intothe location specified on the address pins (A0 through A 17).
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CY7C1041
7c1041
CY7C1041
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Untitled
Abstract: No abstract text available
Text: PARADIGM TECHNOLOGY PARADIGM' INC 5GE D bTmCHO DDOQOn ö ¡PAT IT ^ ÎV IO 256K Static RAM 64K x 4-Bit PDM41258SA PDM41258LA Features Description □ High speed access times Com’l: 1 0 ,1 2 ,1 5 ,2 0 and 25ns M il: 12,15, 20, 2 5 ,3 5 ,4 5 , and 55ns □ Low power operation
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PDM41258SA
PDM41258LA
400mW
350mW
MIL-STD883,
PDM41258
53610b
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MS62256A-25NC
Abstract: P28-1 PACKAGE DIAGRAM MS62256A-25RC
Text: MOSEL PRELIM INARY MS62256A 32K X 8 High Speed CMOS Static RAM FEATURES DESCRIPTION • High-speed - 25/30/35/45/55 ns The MOSEL MS62256A is a 262,144-bit static random access memory organized as 32,768 words by 8 bits and operates from a single 5 volt supply. It is built with
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MS62256A
MS62256AL
990mW
MS62256A
144-bit
t-25NC
P28-2
MS62256A-25RC
R28-1
MS62256A-25NC
P28-1 PACKAGE DIAGRAM
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Untitled
Abstract: No abstract text available
Text: Paradigm 256K Static RAM 64K x 4-Bit with Separate I/O PDM41251SA/LA PDM41252SA/LA Features Description □ High speed access times Com'l: 10,12,15,20 and 25ns M il: 12,15,20,25,35,45, and 55ns □ Separate data input and output pins □ Low power operation
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PDM41251SA/LA
PDM41252SA/LA
PDM41252SA,
PDM41251SA
400mW
PDM41252LA,
350mW
PDM41251:
PDM41252:
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TAG 8510
Abstract: TAG 9148 UZ111 inspection criteria E1 3009
Text: MIL-M-38510/238A 9 March 1981_ SUPERSEDING MIL-M-38510/238 USAF 16 J u n e 1 9 8 0 MILITARY 4096 SPECIFICATION MICROCIRCUITS, DIGITAL, M O S , BIT STATIC RANDOM ACCESS MEMOR Y MONOLITHIC SILICON T h i s s p e c i f i c a t i o n is a p p r o v e d f o r u s e
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MIL-M-38510/238A
MIL-M-38510/238
MIL-M-38510.
I-703-0
TAG 8510
TAG 9148
UZ111
inspection criteria
E1 3009
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v 2164
Abstract: CY7C167A-35VC
Text: CY7C167A SEMICONDUCTOR 16,384 x 1 Static RAM Features Functional Description • Automatic power-down when dese lected • CMOS for optim um speed/power • High speed — 15 ns T he CY7C167A is a high-performance CMOS static RAM organized as 16,384 words by 1 bit. Easy memory expansion is
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CY7C167A
CY7C145DC
Y7C167A-45LC
CY7C167A-45VC
CY7C167A-45DMB
CY7C167A-45LMB
CY7C167A-45KMB
CY7C167A
38-00093-B
v 2164
CY7C167A-35VC
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