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    Untitled

    Abstract: No abstract text available
    Text: 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in the Operating Mode table. In addition to routing data from either D0 or


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    PDF 5-Aug-2002]

    Untitled

    Abstract: No abstract text available
    Text: Si6966EDQ Siliconix Dual N-Ch 2.5-V G-S MOSFET, ESD Protected New Product PRODUCT SUMMARY VDS (V) 20 RDS(ON) (W) ID (A) 0.030 @ VGS = 4.5 V "5.2 0.040 @ VGS = 2.5 V "4.5 ESD Protected 4000 V D1 D2 TSSOP-8 8 D2 7 S2 3 6 S2 4 5 G2 D1 1 S1 2 S1 G1 D Si6966EDQ


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    PDF Si6966EDQ S-56972--Rev. 17-Aug-98

    Untitled

    Abstract: No abstract text available
    Text: 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in the Operating Mode table. In addition to routing data from either D0 or


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    PDF 5962-9165401VXA 100355J-QMLV 5962-9165401VXA 5962-9165401VYA 100355WQMLV 1-Sep-2000]

    Untitled

    Abstract: No abstract text available
    Text: 100325 Low Power Hex ECL-to-TTL Translator General Description Features The 100325 is a hex translator for converting F100K logic levels to TTL logic levels. Differential inputs allow each circuit to be used as an inverting, non-inverting or differential receiver. An internal reference voltage generator provides VBB


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    PDF F100K 5962-9153101MYA 5962-9153101VXA 5962-9153101VYA 31-Jul-2000] 100325J-QMLV 5962-9153101VXA 100325WQMLV

    9153101

    Abstract: 100325DMQB Hex schmitt trigger ecl
    Text: 100325 Low Power Hex ECL-to-TTL Translator General Description Features The 100325 is a hex translator for converting F100K logic levels to TTL logic levels. Differential inputs allow each circuit to be used as an inverting, non-inverting or differential receiver. An internal reference voltage generator provides VBB


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    PDF F100K 5962-9153101VXA 100325J-QMLV 100325WQMLV 5962-9153101VYA 1-Sep-2000] 9153101 100325DMQB Hex schmitt trigger ecl

    Untitled

    Abstract: No abstract text available
    Text: 100301 Low Power Triple 5-Input OR/NOR Gate General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. n n n n 2000V ESD protection Pin/function compatible with 100101


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    PDF DS100302-1 DS100302 24-Pin 5962-9152801MYA 5962-9152801VXA 100301J-QMLV 5962-915280VXA 100301WQMLV 5962-9152801VYA

    Untitled

    Abstract: No abstract text available
    Text: 100341 Low Power 8-Bit Shift Register General Description Features The 100341 contains eight edge-triggered, D-type flip-flops with individual inputs Pn and outputs (Qn) for parallel operation, and with serial inputs (Dn) and steering logic for bidirectional shifting. The flip-flops accept input data a setup


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    PDF 5-Aug-2002]

    ACT573

    Abstract: 54ACT573 54ACT573DMQB 54ACT573LMQB 5962-87664012A 5962-8766401RA 5962R87664012A 5962R8766401RA smd marking QM smd QM
    Text: National P/N 54ACT573 - Octal Latch with TRI-STATE Outputs Products > Military/Aerospace > Logic > FACT ACT > 54ACT573 54ACT573 Product Folder Octal Latch with TRI-STATE Outputs General Description Features Package & Models Datasheet Samples & Pricing Datasheet


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    PDF 54ACT573 54ACT573 MN54ACT573-X 17-Aug-98 ACT373 ACT573 ACT573: 54ACT573DMQB 54ACT573LMQB 5962-87664012A 5962-8766401RA 5962R87664012A 5962R8766401RA smd marking QM smd QM

    act573

    Abstract: No abstract text available
    Text: 54ACT573 Octal Latch with TRI-STATE Outputs General Description Features The ’ACT573 is a high-speed octal latch with buffered common Latch Enable LE and buffered common Output Enable (OE) inputs. n ICC and IOZ reduced by 50% n Inputs and outputs on opposite sides of package


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    PDF 54ACT573 ACT573 ACT373 ACT573: RM54ACT573SSA 54ACT573FM

    Hex schmitt trigger ecl

    Abstract: 100325DMQB 5962-9153101MXA 5962-9153101MYA CERQUAD fmqb 100325J-QMLV 100325WFQMLV 5962-9153101VXA 5962
    Text: National P/N 100325 - Low Power Hex ECL-to-TTL Translator Products > Military/Aerospace > Logic > ECL > 100325 100325 Product Folder Low Power Hex ECL-to-TTL Translator General Description Features Package & Models Datasheet Samples & Pricing Datasheet Title


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    PDF 17-Aug-98 MN100325-X 5962-915res 16-Oct-2002] ics/nat/100325 Hex schmitt trigger ecl 100325DMQB 5962-9153101MXA 5962-9153101MYA CERQUAD fmqb 100325J-QMLV 100325WFQMLV 5962-9153101VXA 5962

    Untitled

    Abstract: No abstract text available
    Text: 100351 Low Power Hex D Flip-Flop General Description Features The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPb and common Master Reset (MR) input. Data enters a master when both CPa and


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    PDF 5962-9457901VXA 100351J-QMLV 100351WQMLV 00351W-QMLV 1-Sep-2000]

    Untitled

    Abstract: No abstract text available
    Text: 100325 Low Power Hex ECL-to-TTL Translator General Description Features The 100325 is a hex translator for converting F100K logic levels to TTL logic levels. Differential inputs allow each circuit to be used as an inverting, non-inverting or differential receiver. An internal reference voltage generator provides VBB


    Original
    PDF F100K 5-Aug-2002]

    Untitled

    Abstract: No abstract text available
    Text: 100351 Low Power Hex D Flip-Flop General Description Features The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPb and common Master Reset (MR) input. Data enters a master when both CPa and


    Original
    PDF 5-Aug-2002]

    Untitled

    Abstract: No abstract text available
    Text: 100302 Low Power Quint 2-Input OR/NOR Gate General Description The 100302 is a monolithic quint 2-input OR/NOR gate with common enable. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. n n n n 2000V ESD protection Pin/function compatible with 100102


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    PDF DS100303-1 5962-9152802VXA 100302J-QMLV 100302WQMLV 5962-9152802VYA 1-Sep-2000]

    5962-9230601VYA

    Abstract: No abstract text available
    Text: 100336 Low Power 4-Stage Counter/Shift Register General Description The 100336 operates as either a modulo-16 up/down counter or as a 4-bit bidirectional shift register. Three Select Sn inputs determine the mode of operation, as shown in the Function Select table. Two Count Enable (CEP, CET) inputs


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    PDF modulo-16 5962-9230601VXA 100336J-QMLV 100336WQMLV 5962-9230601VYA 1-Sep-2000]

    48V electronic power steering

    Abstract: No abstract text available
    Text: 100341 Low Power 8-Bit Shift Register General Description Features The 100341 contains eight edge-triggered, D-type flip-flops with individual inputs Pn and outputs (Qn) for parallel operation, and with serial inputs (Dn) and steering logic for bidirectional shifting. The flip-flops accept input data a setup


    Original
    PDF 5962-9459101VXA 100341J-QMLV 5962-9459101VXA 5962-9459101VYA 100341WQMLV 1-Sep-2000] 48V electronic power steering

    Untitled

    Abstract: No abstract text available
    Text: SÌ6966EDQ VISHAY ▼ Siliconix Dual N-Ch 2.5-V G-S MOSFET, ESD Protected New Product PRODUCT SUM M ARY V ds (V) r DS(ON) (-2) ) I d (A) 0.030 @ V GS = 4.5 V ± 5 .2 0.040 @ V GS = 2.5 V ± 4 .5 20 ESD Protected 4000 V TSSOP-8 Di n . Si Œ Si Œ Gì E J] D2


    OCR Scan
    PDF 6966EDQ S-56972-- 17-Aug-98

    46247 6.3 x 0.8

    Abstract: Din 46247 2,8
    Text: i 4 RELEASED FOR PUBLICATION FREI FÜR VERÖFFENTLICHUNG ALL RIGHTS RESERVED. BY AMP INCORPORATED. ALLE RECHTE VORBEHALTEN THIS DRAWING IS UNPUBLISHED. VERTRAULICHE UNVERÖFFENTLICHTE 301 ZEICHNUNG C COPYRIGHT 19- ,19- i . MATED WITH: PASSEND ZU. LOC DIN 46247


    OCR Scan
    PDF 28JAN86 29JUN97 17AUG98 29-JUL-97 ss5200 /home/ss5200/ed 46247 6.3 x 0.8 Din 46247 2,8