K7A161801M
Abstract: K7A163601M advh
Text: K7A163601M K7A161801M 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85
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K7A163601M
K7A161801M
512Kx36
1Mx18
1Mx18-Bit
117MHz
150mA
110mA
130mA
K7A161801M
K7A163601M
advh
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Untitled
Abstract: No abstract text available
Text: 117MHz SAW Filter 10MHz Bandwidth China Electronics Technology Group Corporation No.26 Research Institute SIPAT Co., Ltd. N11703 Part Number:LB Number:LBN11703 www. sipatsaw.com Features � For IF SAW filter � High attenuation � Single-ended operation
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117MHz
10MHz
LBN11703
2002/95/EC)
10deg/Div
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IDT71V632
Abstract: sram with address counter
Text: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.
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117MHz.
IDT71V632
117MHz
100pinTQFP
x4033
sram with address counter
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AS8C801825
Abstract: AS8C803625 256K x 8 SRAM dip
Text: 256K X 36, 512K X 18 3.3V Synchronous SRAMs 3.3V I/O, Burst Counter Flow-Through Outputs, Single Cycle Deselect AS8C803625 AS8C801825 Features • • 256K x 36, 512K x 18 memory configuration Supports fast access times: - 7.5ns up to 117MHz clock frequency
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AS8C803625
AS8C801825
117MHz
100-pin
36/512K
100pin
AS8C801825
256K x 8 SRAM dip
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71V632
Abstract: IDT71V632
Text: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632/Z with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.
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IDT71V632/Z
117MHz.
IDT71V632
71V632
PK100-1)
71V632SA4PF
71V632S5PF
71V632S6PF
71V632S7PF
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Untitled
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632 with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.
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IDT71V632
MT58LC64K32D7LG-XX)
100-pin
117MHz
100pinTQFP
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Untitled
Abstract: No abstract text available
Text: GSI TECHNOLOGY GS820V32Q/T 64K x 32 Burst GS820V32Q/T 4/5/6, 2.5V I/O, 2.0mA Features • Single 3.3V +5%/-5% power supply • Separate VDDQ to allow 2.375V to 3.465V output supply level • High frequency operation: 117MHz • Fast access time: 4.5ns Clock to Q
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GS820V32Q/T
117MHz
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IDT71V632
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632 with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.
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IDT71V632
117MHz.
IDT71V632
IDT71V632,
117MHz
x4033
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY SSRAM AS5SS128K32 128K x 32 4Mb Synchronous Flow-Through Static Ram FEATURES GENERAL DESCRIPTION • Available in Mil-Temp*, Enhanced & Industrial Ranges • Clock frequency up to 117MHz • Internal self-timed write cycle • Individual Byte Write Control and Global Write
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AS5SS128K32
117MHz
100-Pin
AS5SS128K32
-40oC
105oC
-55oC
125oC
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IDT71V632
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632/Z with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.
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IDT71V632/Z
117MHz.
IDT71V632
117MHz
100pinTQFP
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Untitled
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632 with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.
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IDT71V632
117MHz.
IDT71V632
117MHz
100pinTQFP
x4033
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Untitled
Abstract: No abstract text available
Text: SSRAM PRELIMINARY AS5SS512K18 512K x 18 9Mb Synchronous Flow-Through Static Ram FEATURES • Available in Mil-Temp*, Enhanced* & Industrial Ranges • Clock frequency up to 117MHz • Internal self-timed write cycle • Individual Byte Write Control and Global Write
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AS5SS512K18
117MHz
100-Pin
-40oC
105oC
-55oC
125oC
AS5SS512K18
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Untitled
Abstract: No abstract text available
Text: KM736V990 KM718V090 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85
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KM736V990
KM718V090
512Kx36
1Mx18
1Mx18-Bit
117MHz
150mA
110mA
130mA
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SSRAM
Abstract: AS5SS256K36
Text: SSRAM AS5SS256K36 256K x 36 SSRAM PIN ASSIGNMENT Top View Flow-Through, Synchronous Burst SRAM 100-pin TQFP (DQ) FEATURES OPTIONS MARKING Timing 7.5ns/8.5ns/117MHz 8.5ns/10ns/100MHz 10ns/15ns/66MHz -7.5
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AS5SS256K36
100-pin
5ns/117MHz
5ns/10ns/100MHz
10ns/15ns/66MHz
-55oC
125oC)
-40oC
105oC)
SSRAM
AS5SS256K36
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K7A161801M
Abstract: K7A163601M
Text: K7A163601M K7A161801M 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85
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Original
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K7A163601M
K7A161801M
512Kx36
1Mx18
1Mx18-Bit
117MHz
150mA
110mA
130mA
K7A161801M
K7A163601M
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Untitled
Abstract: No abstract text available
Text: 117MHz SAW Filter 1MHz Bandwidth China Electronics Technology Group Corporation No.26 Research Institute SIPAT Co., Ltd. Part Number: LBS11702 www.sipatsaw.com Features For IF SAW filter High attenuation Single-ended operation Dual In-line Package
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117MHz
LBS11702
2002/95/EC)
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IDT71V632
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632/Z with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.
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Original
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IDT71V632/Z
117MHz.
IDT71V632
117MHz
100pinTQFP
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IDT71V632
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632/Z with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.
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IDT71V632/Z
117MHz.
IDT71V632
100pinTQFP
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junction temperature v850
Abstract: No abstract text available
Text: Preliminary - April 1998 ¡il T t d l N O L O C V 2.5V or 3.3V I/O 117/100/90/50 GS840NBT18FT F eatures Output registers are provided and are controlled by FT mode pin. With FT mode pin, output registers can be programmed in either pipeline mode for very high frequency operation (117MHz or
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100-lead
junction temperature v850
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GS811V
Abstract: IQE3045
Text: in T f ( 4 1 N 0 LOCI G S 811V 32Q /T GS811V32Q/T Q O tf v OO D u v e t* 80-117MHz(P/L) 2.5V_ O fcl\ X O C . DU I O I_ 66MHz(FT) Features • • • • • • • Single 3.3V +5%/-5% power supply Separate VDDQ to allow 2.375V to 3.465V output supply level
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GS811V
32Q/T
80-117MHz
66MHz
117MHz
IQE3045
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CD73
Abstract: No abstract text available
Text: Preliminary - February 98 CU l i tu H0LOCV 2.5V or 3.3V 64K x 64 Burst 117/100/83/75/66 Features • • • • • • • • • • • Single 3.3V +10%/-5% power supply 5-volt tolerant clock High frequency operation: 117MHz Fast access time: 4.5ns Clock to Q
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117MHz
128-lead
GS84064Q/T
GS84064
1023G45
CD73
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A2305
Abstract: No abstract text available
Text: Preliminary - April 1998 id UdlHOLOGU 2.5V or 3.3V I/O 117/100/90/50 GS840NBT32FT F eatures Output registers are provided and are controlled by FT mode pin. With FT mode pin, output registers can be programmed in either pipeline mode for very high frequency operation (117MHz or
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GS840NBT32FT
128Kx32
117MHz)
A2305
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Untitled
Abstract: No abstract text available
Text: ¡il TÆC41 H01 DCV GS81132Q/T GS81132Q/T O O tf v 3.3V_ O f c I V X 0 0 80-117MHz(P/L J 4 P U l O l _ 66MHz(FT) Output enable (OE) and power down control (ZZ) are asynchro nous. 2 mode control pins (LBO & FT) define 4 operation modes
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GS81132Q/T
80-117MHz
66MHz
117MHz)
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DLS FT 031
Abstract: No abstract text available
Text: ¡il TÆC41H01DCV GS81Í32Q/T O O tf G S 81132Q /Í 3.3V_ O f c I V V X 00 J 4 Features • Single 3.3V +l0% /-5% power supply • High frequency operation: 117MHz • Fast access time: 4.5ns Clock to Q • FT mode pin for either flow-thru or pipeline operation
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32Q/T
GS81132Q/T
80-117MHz
66MHz
117MHz
DLS FT 031
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